參數(shù)資料
型號(hào): HYM71V16755HCT8M-P
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 16M X 72 SYNCHRONOUS DRAM MODULE, 6 ns, DMA168
封裝: DIMM-168
文件頁數(shù): 5/14頁
文件大小: 236K
代理商: HYM71V16755HCT8M-P
PC100 SDRAM Unbuffered DIMM
Rev. 0.4/Dec. 01
14
HYM71V16755HCT8M Series
COMMAND TRUTH TABLE
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don
′t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
Opcode = Operand Code, NOP = No Operation
3. The burst read sigle write mode is entered by programming the Write burst mode bit (A9) in the mode register to a logic 1.
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
DQM
ADDR
A10/
AP
BA
Note
Mode Register Set
H
X
LLLL
X
OP code
No Operation
H
X
HX
X
XX
LH
H
Bank Active
H
X
L
H
X
RA
V
Read
HX
L
H
L
H
X
CA
L
V
Read with Autoprecharge
H
Write
HX
L
H
L
X
CA
L
V
Write with Autoprecharge
H
Precharge All Banks
HX
L
H
L
X
HX
Precharge selected Bank
LV
Burst Stop
H
X
L
H
L
X
DQM
H
X
V
X
Auto Refresh
H
L
H
X
Burst-Read-Single-WRITE
H
X
LLLL
X
A9 Pin High
(Other Pins OP code)
MRS
Mode
Self Refresh1
Entry
H
L
LLL
H
X
Exit
L
H
HX
X
LH
H
Precharge
power down
Entry
H
L
HX
X
LH
H
Exit
L
H
HX
X
LH
H
Clock
Suspend
Entry
H
L
HX
X
LV
V
Exit
L
H
X
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