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參數(shù)資料
| 型號： | HYM71V16755HCT8M-P |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 16M X 72 SYNCHRONOUS DRAM MODULE, 6 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 236K |
| 代理商： | HYM71V16755HCT8M-P |
PC100 SDRAM Unbuffered DIMM
Rev. 0.4/Dec. 01
6
HYM71V16755HCT8M Series
SERIAL PRESENCE DETECT
BYTE
NUMBER
FUNCTION
DESCRIPTION
FUNCTION
VALUE
NOTE
-8
-P
-S
-8
-P
-S
BYTE0
# of Bytes Written into Serial Memory at Module
Manufacturer
128 Bytes
80h
BYTE1
Total # of Bytes of SPD Memory Device
256 Bytes
08h
BYTE2
Fundamental Memory Type
SDRAM
04h
BYTE3
# of Row Addresses on This Assembly
12
0Ch
1
BYTE4
# of Column Addresses on This Assembly
10
0Ah
BYTE5
# of Module Banks on This Assembly
1 Bank
01h
BYTE6
Data Width of This Assembly
72 Bits
48h
BYTE7
Data Width of This Assembly (Continued)
-
00h
BYTE8
Voltage Interface Standard of This Assembly
LVTTL
01h
BYTE9
SDRAM Cycle Time @/CAS Latency=3
8ns
10ns
80h
A0h
BYTE10
Access Time from Clock @/CAS Latency=3
6ns
60h
BYTE11
DIMM Configuration Type
ECC
02h
BYTE12
Refresh Rate/Type
15.625us
/ Self Refresh Supported
80h
BYTE13
Primary SDRAM Width
x8
08h
BYTE14
Error Checking SDRAM Width
x8
08h
BYTE15
Minimum Clock Delay Back to Back Random Column
Address
tCCD = 1 CLK
01h
BYTE16
Burst Lenth Supported
1,2,4,8,Full Page
8Fh
2
BYTE17
# of Banks on Each SDRAM Device
4 Banks
04h
BYTE18
SDRAM Device Attributes, /CAS Lataency
/CAS Latency=2,3
06h
BYTE19
SDRAM Device Attributes, /CS Lataency
/CS Latency=0
01h
BYTE20
SDRAM Device Attributes, /WE Lataency
/WE Latency=0
01h
BYTE21
SDRAM Module Attributes
Neither Buffered nor Registered
00h
BYTE22
SDRAM Device Attributes, General
+/- 10% voltage tolerence, Burst Read
Single Bit Write, Precharge All, Auto
Precharge, Early RAS Precharge
0Eh
BYTE23
SDRAM Cycle Time @/CAS Latency=2
8ns
10ns
12ns
A0h
C0h
BYTE24
Access Time from Clock @/CAS Latency=2
6ns
60h
BYTE25
SDRAM Cycle Time @/CAS Latency=1
-
00h
BYTE26
Access Time from Clock @/CAS Latency=1
-
00h
BYTE27
Minimum Row Precharge Time (tRP)
20ns
14h
BYTE28
Minimum Row Active to Row Active Delay (tRRD)
16ns
20ns
10h
14h
BYTE29
Minimum /RAS to /CAS Delay (tRCD)
20ns
14h
BYTE30
Minimum /RAS Pulse Width (tRAS)
48ns
50ns
30h
32h
BYTE31
Module Bank Density
128MB
20h
BYTE32
Command and Address Signal Input Setup Time
2ns
20h
BYTE33
Command and Address Signal Input Hold Time
1ns
10h
BYTE34
Data Signal Input Setup Time
2ns
20h
BYTE35
Data Signal Input Hold Time
1ns
10h
BYTE36
~61
Superset Information (may be used in future)
-
00h
BYTE62
SPD Revision
Intel SPD 1.2B
12h
3, 8
BYTE63
Checksum for Byte 0~62
-
02h
28h
48h
BYTE64
Manufacturer JEDEC ID Code
Hynix JEDED ID
ADh
BYTE65
~71
....Manufacturer JEDEC ID Code
Unused
FFh
BYTE72
Manufacturing Location
HSI (Korea Area)
HSA (United States Area)
HSE (Europe Area)
HSJ (Japan Area)
HSS(Singapore)
Asia Area
0*h
1*h
2*h
3*h
4*h
5*h
10
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HYM71V16C735AT8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16Mx72|3.3V|K/H|x9|SDR SDRAM - Registered DIMM 128MB |
| HYM71V16C735AT8-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| HYM71V16C735AT8-K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| HYM71V16C735BT8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16Mx72|3.3V|K/H|x8|SDR SDRAM - Registered DIMM 128MB |
| HYM71V16C735HCT8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16Mx72|3.3V|K/H|x9|SDR SDRAM - Registered DIMM 128MB |
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