參數(shù)資料
型號(hào): HY62V16100LR2-I-12
廠商: HYNIX SEMICONDUCTOR INC
元件分類: SRAM
英文描述: 128K X 8 STANDARD SRAM, 120 ns, PDSO44
封裝: 0.400 INCH, REVERSE, TSOP2-44
文件頁數(shù): 7/10頁
文件大?。?/td> 151K
代理商: HY62V16100LR2-I-12
HY62V16100-(I)/HY62U16100-(I) Series
Rev.07 /Jan.99
7
READ CYCLE 3(Note 1,3,4)
CS
tACS
Data Valid
tCLZ(5)
tCHZ(5)
Data
Out
Notes:
1. /WE is high for the Read Cycle.
2. Device is continuously selected. /CS = V
IL
3. Address valid is prior to or coincident with /CS transition low
4. /OE = V
IL
5. Transition is measured + 200mV from steady state voltage.
This parameter is sampled and not 100% tested.
WRITE CYCLE 1
ADDR
CS
Data
Out
tWC
tDW
tOHZ(3,9)
WE
Data Valid
tDH
tWP(1)
tAS
Data In
tCW
tWR(2)
tBW
tAS
tAW
UB,LB
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