參數資料
型號: HY5DU56822ELFP-D43
廠商: Hynix Semiconductor Inc.
英文描述: 256Mb DDR SDRAM
中文描述: 256Mb的DDR SDRAM內存
文件頁數: 25/29頁
文件大小: 260K
代理商: HY5DU56822ELFP-D43
Rev. 1.1 / J une 2006
25
1
HY5DU56822E(L)FP
HY5DU561622E(L)FP
20.tQH = tHP - tQHS, where:
tHP = minimum half clock period for any given cycle and is defined by clock high or clock low (tCH, tCL). tQHS accounts for 1) The
pulse duration distortion of on-chip clock circuits; and 2) The worst case push--out of DQS on one transition followed by the
worst case pull--in of DQ on the next transition, both of which are, separately, due to data pin skew and output pattern effects,
and p-channel to n-channel variation of the output drivers.
21. tDQSQ:
Consists of data pin skew and output pattern effects, and p-channel to n-channel variation of the output drivers for any given
cycle.
22. tDAL = (tWR/tCK) + (tRP/tCK)
For each of the terms above, if not already an integer, round to the next highest integer.
Example: For DDR266B at CL=2.5 and tCK=7.5 ns
tDAL = ((15 ns / 7.5 ns) + (20 ns / 7.5 ns)) clocks
= ((2) + (3)) clocks
= 5 clocks
23. In all circumstances, tXSNR can be satisfied using
tXSNR = tRFCmin + 1*tCK
24. The only time that the clock frequency is allowed to change is during self-refresh mode.
25. If refresh timing or tDS/tDH is violated, data corruption may occur and the data must be re-written with valid data before a valid
READ can be executed.
相關PDF資料
PDF描述
HY5DU56822ELFP-H 256Mb DDR SDRAM
HY5DU56822ELFP-J 256Mb DDR SDRAM
HY5DU56822ELFP-K 256Mb DDR SDRAM
HY5DU56822ELFP-L 256Mb DDR SDRAM
HY5DV281622DT 128M(8Mx16) GDDR SDRAM
相關代理商/技術參數
參數描述
HY5DU56822ELFP-H 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:256Mb DDR SDRAM
HY5DU56822ELFP-J 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:256Mb DDR SDRAM
HY5DU56822ELFP-K 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:256Mb DDR SDRAM
HY5DU56822ELFP-L 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:256Mb DDR SDRAM
HY5DU56822FLTP-D43 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:256Mb DDR SDRAM