參數資料
型號: HY57V658020BTC
廠商: Hynix Semiconductor Inc.
英文描述: 8Mx8|3.3V|4K|H|SDR SDRAM - 64M
中文描述: 8Mx8 | 3.3 | 4K的|魔| SDRAM的特別提款權- 64米
文件頁數: 8/12頁
文件大?。?/td> 146K
代理商: HY57V658020BTC
HY57V658020B
Rev. 1.6/Nov. 01
8
AC CHARACTERISTICS II
Note :
1. A new command can be given tRRC after self refresh exit
Parameter
Symbol
-75
-8
-10P
-10S
-10
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
RAS Cycle Time
Operation
t
RC
65
-
68
-
70
-
70
-
80
-
ns
Auto Refresh
t
RRC
65
-
68
-
70
-
70
-
96
-
ns
RAS to CAS Delay
t
RCD
20
-
20
-
20
-
20
-
30
-
ns
RAS Active Time
t
RAS
45
100K
48
100K
50
100K
50
100K
50
100K
ns
RAS Precharge Time
t
RP
20
-
20
-
20
-
20
-
30
-
ns
RAS to RAS Bank Active Delay
t
RRD
15
-
16
-
20
-
20
-
20
-
ns
CAS to CAS Delay
t
CCD
1
-
1
-
1
-
1
-
1
-
CLK
Write Command to Data-In Delay
t
WTL
0
-
0
-
0
-
0
-
0
-
CLK
Data-In to Precharge Command
t
DPL
2
-
2
-
1
-
1
-
1
-
CLK
Data-In to Active Command
t
DAL
5
-
5
-
3
-
3
-
4
-
CLK
DQM to Data-Out Hi-Z
t
DQZ
2
-
2
-
2
-
2
-
2
-
CLK
DQM to Data-In Mask
t
DQM
0
-
0
-
0
-
0
-
0
-
CLK
MRS to New Command
t
MRD
2
-
2
-
2
-
2
-
2
-
CLK
Precharge to Data
Output Hi-Z
CAS Latency = 3
t
PROZ3
3
-
3
-
3
-
3
-
3
-
CLK
CAS Latency = 2
t
PROZ2
2
-
2
-
2
-
2
-
2
-
CLK
Power Down Exit Time
t
PDE
1
-
1
-
1
-
1
-
1
-
CLK
Self Refresh Exit Time
t
SRE
1
-
1
-
1
-
1
-
1
-
CLK
1
Refresh Time
t
REF
-
64
-
64
-
64
-
64
-
64
ms
相關PDF資料
PDF描述
HY57V658020BLTC-10 CAP,0603,50V,NPO,150PF
HY57V658020BLTC-10P 4 Banks x 2M x 8Bit Synchronous DRAM
HY57V658020BLTC-10S 4 Banks x 2M x 8Bit Synchronous DRAM
HY57V658020BLTC-75 4 Banks x 2M x 8Bit Synchronous DRAM
HY57V658020BLTC-8 CCAP 2.0PF +-.25 50V 0603
相關代理商/技術參數
參數描述
HY57V658020BTC-10 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 2M x 8Bit Synchronous DRAM
HY57V658020BTC-10P 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 2M x 8Bit Synchronous DRAM
HY57V658020BTC-10S 制造商:HYNDAI 功能描述:
HY57V658020BTC-10SI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM
HY57V658020BTC-75 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:4 Banks x 2M x 8Bit Synchronous DRAM