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12/13/01
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workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
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HV506
Preliminary
80-Lead
Ceramic Gullwing
64-Lead 3-Sided
Plastic Gullwing
Die
General Description
The HV506 is a low-voltage serial to high-voltage parallel con-
verter with push-pull outputs. It is especially suitable for use as
a symmetric row driver in AC thin-film electroluminescent
(ACTFEL) displays.
When the data reset pin (DR
) is at logic high, it will reset all the
outputs of the internal shift register to zero. At the same time, the
output of the shift register will start shifting a logic high from the
least significant bit to the most significant bit. The DR
can be
triggered at any time. The DIR pin controls the direction of data
through the device. When DIR is at logic high, DR
IOA
is the input
and DR
is the output. When DIR is grounded, DR
is the input
and the DR
is the output. See the Output Sequence Operation
Table for output sequence. The POL and OE pins perform the
polarity select and output enable function respectively. Data is
clocked through the shift register loaded on the low to high
transition of the clock. A logic high in the shift register will cause
the other corresponding output to swing to V
if POL is high, or
to V
if POL is low. All other outputs will be in the High-Z state.
If OE is at logic high all outputs will be in the High-Z state. An
output in the High-Z state may block up to 275V above V
or
275V below V
. The D
/D
pins are for the positive/negative
discharge of the high voltage output HV
OUT
. Data output buffers
are provided for cascading devices.
LV
requires low current for the HV506 logic section. V
requires high current for the output section . Typically these two
pins are at the same potential. The same current and potential
conditions apply to the LV
, logic, and V
, output pins. V
must
always be equal or greater than the most positive supply.
Features
Processed with HVDI
technology
Symmetric row drive
Output voltage up to 275V
Source/Sink current 300mA (min.)
Shift Register Speed 3MHz
Pin-programmable shift direction (DIR)
Hi-Rel processing available
Absolute Maximum Ratings
Logic supply voltage, LV
DD1
Output supply voltage, V
DD1
Substrate bias voltage, V
sub
Output voltage, HV
OUT
Logic input levels
Continuous total power dissipation
2
Ceramic
-0.5V to +15V
-0.5V to +15V
See Note 3
±
300V
-0.5V to V
DD
+0.5V
1900mW
1200mW
Plastic
Operating temperature range
Plastic
Ceramic -55
°
C to +125
°
C
-65
°
C to +150
°
C
-40
°
C to +85
°
C
Storage temperature range
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
260
°
C
Notes:
1. All voltages are referenced to V
.
2. For operation above 25
°
C ambient derate linearly to maximum operating
temperture at 20mW/
°
C for plasitc and at 19mW/
°
C for ceramic.
3. V
sub
must be the most positive with respect to V
SS
.
Ordering Information
Package Options
Device
HV506
HV506DG
HV506PG
HV506X
275V 40-Channel Row Driver with SCR Outputs