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參數(shù)資料
| 型號： | HUF75309T3ST |
| 廠商： | INTERSIL CORP |
| 元件分類： | JFETs |
| 英文描述： | 3A, 55V, 0.070 Ohm, N-Channel UltraFET Power MOSFET |
| 中文描述： | 3 A, 55 V, 0.07 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁數(shù)： | 6/8頁 |
| 文件大小： | 88K |
| 代理商： | HUF75309T3ST |
28
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, T
J(MAX)
, and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, P
D(MAX)
,
in an application. Therefore the application’s ambient
temperature, T
A
(
o
C), and thermal impedance R
θ
JA
(
o
C/W)
must be reviewed to ensure that T
J(MAX)
is never exceeded.
Equation 1 mathematically represents the relationship and
serves as the basis for establishing the rating of the part.
In using surface mount devices such as the SOT-223
package, the environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of the
P
D(MAX)
is complex and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Intersil provides thermal information to assist the designer’s
preliminary application evaluation. Figure 20 defines the
R
θ
JA
for the device as a function of the top copper
(component side) area. This is for a horizontally positioned
FR-4 board with 1oz copper after 1000 seconds of steady
state power with no air flow.This graph provides the
necessary information for calculation of the steady state
junction temperature or power dissipation. Pulse
applications can be evaluated using the Intersill device Spice
thermal model or manually utilizing the normalized maximum
transient thermal impedance curve.
Displayed on the curve are the three R
θ
JA
values listed in
the Electrical Specifications table. The three points were
chosen to depict the compromise between the copper board
area, the thermal resistance and ultimately the power
dissipation, P
D(MAX)
. Thermal resistances corresponding to
other component side copper areas can be obtained from
Figure 20 or by calculation using Equation 2. The area, in
square inches is the top copper area including the gate and
source pads.
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
Test Circuits and Waveforms
(Continued)
V
GS
R
L
R
GS
DUT
+
-
V
DD
V
DS
V
GS
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
(EQ. 1)
PD MAX
)
--------------------------------------------
–
(
)
θ
JA
=
50
100
150
200
0.01
0.1
1.0
143
o
C/W - 0.026in
2
AREA, TOP COPPER AREA (in
2
)
R
θ
J
o
C
126
o
C/W - 0.068in
2
110
o
C/W - 0.164in
2
R
θ
JA
= 77.6 - 17.9 * ln(AREA)
FIGURE 20. THERMAL RESISTANCE vs MOUNTING PAD
AREA
(EQ. 2)
R
θ
JA
77.6
17.9
Area
(
)
ln
×
–
=
HUF75309T3ST
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| HUF75321D3ST | 功能描述:MOSFET 20a 55V N-Channel UltraFET RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
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