- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄385404 > HT82K68 (Holtek Semiconductor Inc.) Multimedia Keyboard Encoder OTP PDF資料下載
參數(shù)資料
| 型號(hào)： | HT82K68 |
| 廠(chǎng)商： | Holtek Semiconductor Inc. |
| 英文描述： | Multimedia Keyboard Encoder OTP |
| 中文描述： | 多媒體鍵盤(pán)編碼器檢察官辦公室 |
| 文件頁(yè)數(shù)： | 13/40頁(yè) |
| 文件大?。?/td> | 260K |
| 代理商： | HT82K68 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)
HT82K68E
13
August 8, 2000
Preliminary
If an RC oscillator is used, an external resistor
between OSC1 and VDD is needed and the re-
sistance must range from 51k
system clock, divided by 4, is available on
OSC2, which can be used to synchronize exter-
nal logic. The RC oscillator provides the most
cost effective solution. However, the frequency
of the oscillation may vary with VDD, tempera-
ture and the chip itself due to process varia-
tions. It is, therefore, not suitable for timing
sensitive operations where accurate oscillator
frequency is desired.
to 1M . The
If the Crystal oscillator is used, a crystal across
OSC1 and OSC2 is needed to provide the feed-
back and phase shift needed for oscillator, no
other external components are needed. Instead
of a crystal, the resonator can also be connected
between OSC1 and OSC2 to get a frequency ref-
erence, but two external capacitors in OSC1
and OSC2 are required.
The WDT oscillator is a free running on-chip
RC oscillator, and no external components are
required. Even if the system enters the power
down mode, the system clock is stopped, but the
WDT oscillator still works for a period of ap-
proximately 78
s. The WDT oscillator can be
disabled by mask option to conserve power.
Watchdog Timer
WDT
The WDT clock source is implemented by a ded-
icated RC oscillator (WDT oscillator) or instruc-
tion clock (system clock divided by 4), decided
by mask options. This timer is designed to pre-
vent a software malfunction or sequence jump-
ing to an unknown location with unpredictable
results. The Watchdog Timer can be disabled by
mask option. If the Watchdog Timer is disabled,
all the executions related to the WDT results in
no operation.
Once the internal WDT oscillator (RC oscillator
normally with a period of 78 s) is selected, it is
first divided by 256 (8-stages) to get the nomi-
nal time-out period of approximately 20 ms.
This time-out period may vary with tempera-
ture, VDD and process variations. By invoking
the WDT prescaler, longer time-out periods can
be realized. Writing data to WS2, WS1, WS0
(bit 2,1,0 of the WDTS) can give different
time-out periods. If WS2, WS1, WS0 are all
equal to 1, the division ratio is up to 1:128, and
the maximum time-out period is 2.6 seconds.
IftheWDToscillatorisdisabled,theWDTclock
may still come from the instruction clock and
operate in the same manner except that in the
HALT state the WDT may stop counting and
lose its protecting purpose. In this situation the
WDT logic can be restarted by external logic.
The high nibble and bit 3 of the WDTS are re-
served for user defined flags, which can be used
to indicate some specified status.
If the device operates in a noisy environment,
using the on-chip RC oscillator (WDT OSC) is
strongly recommended, since the HALT will
stop the system clock.
WS2
WS1
WS0
Division Ratio
0
0
0
1:1
0
0
1
1:2
0
1
0
1:4
0
1
1
1:8
1
0
0
1:16
1
0
1
1:32
1
1
0
1:64
1
1
1
1:128
The WDT overflow under normal operation will
initialize chipreset andsetthestatusbitTO.An
overflow in the HALT mode, initializes a warm
reset only when the PC and SP are reset to zero.
To clear the contents of the WDT (including the
WDT prescaler ), three methods are adopted; ex-
ternal reset (a low level to RESET), software in-
struction(s), or a HALT instruction. There are two
types of software instructions; CLR WDT and
CLR WDT1/CLR WDT2. Of these two types of in-
struction, only one can be active depending on the
mask option
CLR WDT times selection option .
If the CLR WDT is selected (ie. CLR WDT times
equal one), any execution of the CLR WDT in-
structionwillcleartheWDT.Incase CLRWDT1
and CLR WDT2 are chosen (ie. CLRWDT times
equal two), these two instructions must be exe-
WDTS register
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT82K94A | USB Multimedia Keyboard Encoder 8-Bit MCU |
| HT82K94E | USB Multimedia Keyboard Encoder 8-Bit MCU |
| HT82K94E_07 | USB Multimedia Keyboard Encoder 8-Bit MCU |
| HT82K95AE | USB Multimedia Keyboard Encoder 8-Bit MCU |
| HT82K95EE | USB Multimedia Keyboard Encoder 8-Bit MCU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT82K68A | 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:Multimedia Keyboard Encoder Body |
| HT82K68A_01 | 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:8-Bit Multimedia Keyboard Encoder Mask MCU |
| HT82K68A-L | 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:Multimedia Keyboard Encoder 8-Bit MCU |
| HT82K68E | 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:Multimedia Keyboard Encoder OTP |
| HT82K68E_07 | 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:Multimedia Keyboard Encoder 8-Bit OTP MCU |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。