參數(shù)資料
型號(hào): ht1621b
廠商: Holtek Semiconductor Inc.
英文描述: RAM Mapping 324 LCD Controller for I/O MCU
中文描述: 內(nèi)存映射32 4 LCD控制器的I / O控制器
文件頁(yè)數(shù): 4/20頁(yè)
文件大?。?/td> 179K
代理商: HT1621B
Pad Coordinates
Unit: mil
Pad No.
X
Y
Pad No.
X
Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
55.04
58.52
58.52
58.52
58.52
58.52
58.52
58.52
58.52
58.52
44.07
31.58
20.70
13.98
7.05
0.34
6.33
12.96
19.59
58.14
58.14
58.14
58.14
58.14
59.46
22.18
15.56
5.36
4.51
11.14
34.76
41.90
49.13
59.08
59.08
59.08
59.08
59.08
59.08
59.08
59.08
59.08
59.08
58.44
51.81
45.18
38.55
31.92
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
58.14
58.14
58.14
58.14
58.14
58.14
58.14
58.14
55.55
48.92
42.29
35.66
29.03
22.40
15.77
9.14
2.42
4.21
10.84
17.47
24.10
30.73
38.17
45.39
25.29
18.66
11.94
5.31
1.32
7.95
14.58
21.21
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
59.46
Pad Description
Pad No.
Pad Name
I/O
Function
1
CS
I
Chip selection input with pull-high resistor
When the CS is logic high, the data and command read from or written to
the HT1621 are disabled. The serial interface circuit is also reset. But if CS
is at logic low level and is input to the CS pad, the data and command trans-
mission between the host controller and the HT1621 are all enabled.
2
RD
I
READ clock input with pull-high resistor
DataintheRAMoftheHT1621areclockedoutonthefallingedgeofthe RD
signal. The clocked out data will appear on the DATA line. The host control-
ler can use the next rising edge to latch the clocked out data.
3
WR
I
WRITE clock input with pull-high resistor
Data on the DATA line are latched into the HT1621 on the rising edge of the
WR signal.
4
DATA
I/O
Serial data input/output with pull-high resistor
5
VSS
Negative power supply, ground
7
OSCI
I
The OSCI and OSCO pads are connected to a 32.768kHz crystal in order to
generate a system clock. If the system clock comes from an external clock
source, the external clock source should be connected to the OSCI pad. But
if an on-chip RC oscillator is selected instead, the OSCI and OSCO pads
can be left open.
6
OSCO
O
8
VLCD
I
LCD power input
9
VDD
Positive power supply
10
IRQ
O
Time base or WDT overflow flag, NMOS open drain output
11, 12
BZ, BZ
O
2kHz or 4kHz tone frequency output pair
13~16
COM0~COM3
O
LCD common outputs
48~17
SEG0~SEG31
O
LCD segment outputs
HT1621
Rev. 1.30
4
August 6, 2003
相關(guān)PDF資料
PDF描述
HT1621 RAM Mapping 32 x 4 LCD Controller for I/O μC(存儲(chǔ)器映射、用于I/O接口微機(jī)的32 x 4模式LCD控制器)
HT16220 RAM Mapping 32 x 8 LCD Controller for I/O μC(存儲(chǔ)器映射、用于I/O接口微機(jī)的32 x 8模式LCD控制器)
HT1622 RAM Mapping 32 x 8 LCD Controller for I/O μC(存儲(chǔ)器映射、用于I/O接口微機(jī)的32 x 8模式LCD控制器)
HT1623 RAM Mapping 48x8 LCD Controller for I/O C
HT1625 RAM Mapping 64x 8 LCD Controller for I/O C
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參數(shù)描述
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