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參數(shù)資料
型號: HMP8156ACNZ
廠商: Intersil
文件頁數(shù): 14/34頁
文件大小: 0K
描述: IC VIDEO ENCODER NTSC/PAL 64MQFP
標(biāo)準(zhǔn)包裝: 84
類型: NTSC/PAL 編碼器
應(yīng)用: 多媒體,視頻編輯
電壓 - 電源,模擬: 4.75 V ~ 5.25 V
電壓 - 電源,數(shù)字: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 64-BQFP
供應(yīng)商設(shè)備封裝: 64-MQFP(14x14)
包裝: 托盤
21
FN4343.5
August 20, 2009
TABLE 18. HOST CONTROL REGISTER
SUB ADDRESS = 0FH
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7
Software Reset
Setting this bit to “1” initiates a software reset. It is automatically reset to a “0” after the reset
sequence is complete.
0B
6
Power Down Enable
0 = Normal operation
1 = Power down mode
0B
5NTSC/PAL 2
Output Mode
0 = Enabled
1 = Disabled
0B
4
Closed Caption
Line 21
Write Status
0 = Caption_21A and Caption_21B data registers contain unused data
1 = Data has been output, host processor may now write to the registers
1B
3
Closed Caption
Line 284
Write Status
0 = Caption_284A and Caption_284B data registers contain unused data
1 = Data has been output, host processor may now write to the registers
1B
2NTSC/PAL 1
Output Mode
0 = Enabled
1 = Disabled
0B
1Y/G
Output Mode
0 = Enabled
1 = Disabled
0B
0C/B
Output Mode
0 = Enabled
1 = Disabled
0B
TABLE 19. CLOSED CAPTION_21A DATA REGISTER
SUB ADDRESS = 10H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 21 Caption
Data
(First Byte)
This register is cascaded with the closed caption_21B data register and they are read out
serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A
data register is shifted out first.
80H
TABLE 20. CLOSED CAPTION_21B DATA REGISTER
SUB ADDRESS = 11H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 21 Caption
Data
(Second Byte)
This register is cascaded with the closed caption_21A data register and they are read out
serially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A
data register is shifted out first.
80H
TABLE 21. CLOSED CAPTION_284A DATA REGISTER
SUB ADDRESS = 12H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 284 Caption
Data
(First Byte)
This register is cascaded with the closed caption_284B data register and they are read out
serially as 16 bits during line 281, 284, or 335 if line 284 captioning is enabled. Bit D0 of the
284A data register is shifted out first.
80H
HMP8154, HMP8156A
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