- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370640 > HMD16M72D9A-F10L (Hanbit Electronics Co.,Ltd.) Synchronous DRAM Module 128Mbyte (8Mx72bit),DIMM with ECC based on 16Mx8, 4Banks, 4K Ref., 3.3V PDF資料下載
參數(shù)資料
| 型號(hào)： | HMD16M72D9A-F10L |
| 廠商： | Hanbit Electronics Co.,Ltd. |
| 英文描述： | Synchronous DRAM Module 128Mbyte (8Mx72bit),DIMM with ECC based on 16Mx8, 4Banks, 4K Ref., 3.3V |
| 中文描述： | 同步DRAM模塊128Mbyte（8Mx72bit），帶ECC內(nèi)存的基礎(chǔ)上16Mx8，4Banks，4K的參考。，3.3 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 95K |
| 代理商： | HMD16M72D9A-F10L |
HANBit HSD16M72D9A
URL:www.hbe.co.kr
- 5 -
HANBit Electronics Co.,Ltd.
REV.1.0 (August.2002)
DC OPERATING CONDITIONS
(Recommended operating conditions (Voltage referenced to VSS = 0V, TA = 0 to 70
°
C) )
PARAMETER
SYMBOL
MIN
TYP.
MAX
UNIT
NOTE
Supply Voltage
Vcc
3.0
3.3
3.6
V
Input High Voltage
V
IH
2.0
3.0
Vcc+0.3
V
1
Input Low Voltage
V
IL
-0.3
0
0.8
V
2
Output High Voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output Low Voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input leakage current
Notes :
1. V
IH
(max) = 5.6V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
≤
V
.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
I
LI
-10
-
10
uA
3
CAPACITANCE
(VCC = 3.3V, TA = 23
°
C, f = 1MHz, VREF =1.4V
±
200 mV)
DESCRIPTION
SYMBOL
MIN
MAX
UNITS
Clock
C
CLK
2.5
4.0
pF
/RAS, /CAS,/WE,/CS, CKE, DQM
C
IN
2.5
5.0
pF
Address
C
ADD
2.5
5.0
pF
DQ (DQ0 ~ DQ7)
C
OUT
4.0
6.5
pF
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70
°
C)
VERSION
-12
PARAMETER
SYMBOL
TEST
CONDITION
-3
-10
10L
UNIT
NOTE
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
(min)
I
O
= 0mA
CKE
≤
V
IL
(max)
t
CC
=10ns
CKE & CLK
≤
V
IL
(max)
t
CC
=
∞
CKE
≥
V
IH
(min)
CS*
≥
V
(min), t
=10ns
Input signals are changed
one time during 20ns
CKE
≥
V
IH
(min)
CLK
≤
V
(max), t
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
=10ns
CKE&CLK
≤
V
IL
(max)
t
CC
=
∞
CKE
≥
V
IH
(min),
CS*
≥
V
(min), t
=10ns
Input signals are changed
one time during 20ns
CKE
≥
VIH(min)
CLK
≤
VIL(max), t
CC
=
∞
Input signals are stable
120
120
110
110
mA
1
I
CC2
P
1
mA
Precharge
current in
power-down mode
standby
I
CC2
PS
1
mA
I
CC2
N
20
Precharge
current in
non power-down mode
standby
I
CC2
NS
7
mA
I
CC3
P
5
Active standby current in
power-down mode
I
CC3
PS
5
mA
I
CC3
N
30
Active standby current in
non power-down mode
(One bank active)
I
CC3
NS
20
mA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HMD16M72D9A-F12 | Synchronous DRAM Module 128Mbyte (8Mx72bit),DIMM with ECC based on 16Mx8, 4Banks, 4K Ref., 3.3V |
| HMD16M72D9A-F13 | Synchronous DRAM Module 128Mbyte (8Mx72bit),DIMM with ECC based on 16Mx8, 4Banks, 4K Ref., 3.3V |
| HMD1M1Z1 | 1Mbit(1Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD1M1Z1-5 | 1Mbit(1Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD1M1Z1-6 | 1Mbit(1Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMD16M72D9A-F12 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:Synchronous DRAM Module 128Mbyte (8Mx72bit),DIMM with ECC based on 16Mx8, 4Banks, 4K Ref., 3.3V |
| HMD16M72D9A-F13 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:Synchronous DRAM Module 128Mbyte (8Mx72bit),DIMM with ECC based on 16Mx8, 4Banks, 4K Ref., 3.3V |
| HMD1M1Z1 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:1Mbit(1Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD1M1Z1-5 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:1Mbit(1Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
| HMD1M1Z1-6 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:1Mbit(1Mx1bit) Fast Page Mode, 1K Refresh, 20Pin ZIP, 5V Design |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。