參數(shù)資料
型號(hào)： HM51W18165J-7
廠商： Hitachi,Ltd.
英文描述： 16 M EDO DRAM (1-Mword 16-bit) 4 k Refresh/1 k Refresh
中文描述： 16米EDO公司的DRAM（1 - Mword 16位）4畝刷新/ 1畝刷新
文件頁(yè)數(shù)： 17/36頁(yè)
文件大小： 461K
代理商： HM51W18165J-7
HM51W16165 Series, HM51W18165 Series
17
Notes concerning 2
CAS
control
Please do not separate the
UCAS
/
LCAS
operation timing intentionally. However skew between
UCAS
/
LCAS
are allowed under the following conditions.
1. Each of the
UCAS
/
LCAS
should satisfy the timing specifications individually.
2. Different operation mode for upper/lower byte is not allowed; such as following.
RAS
UCAS
LCAS
WE
Delayed write
Early write
3. Closely separated upper/lower byte control is not allowed. However when the condition (t
CP
≤
t
UL
) is
satisfied, EDO page mode can be performed.
RAS
UCAS
LCAS
tUL
4. Byte control operation by remaining
UCAS
or
LCAS
high is guaranteed.
This Material Copyrighted By Its Respective Manufacturer
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