參數(shù)資料
型號(hào)： HIP1012ACB
廠商： INTERSIL CORP
元件分類： 電源管理
英文描述： Dual Power Distribution Controller
中文描述： 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14
封裝： PLASTIC, MS-012AB, SOIC-14
文件頁數(shù)： 5/15頁
文件大?。?/td> 173K
代理商： HIP1012ACB
5
HIP1012 Description and Operation
The HIP1012 is a multi featured dual power supply
distribution controller, including programmable current
limiting regulation and time to latch off. Additionally the
HIP1012 operates both as a +3.3V and 5V or a +5V and
+12V power supply controller with each mode having
appropriate Under Voltage (UV) fault notification levels.
Upon initial power up HIP1012 can either isolate the
voltage supply from the load by holding the external
N-Channel MOSFET switches off or apply the supply rail
voltage directly to the load for true hot swap capability. In
either case the HIP1012 turns on in a soft start mode
protecting the supply rail from sudden current loading. If
either PWRON pin is pulled low the HIP1012 will be in true
hot swap mode. Both PWRON pins must be high to turn off
the HIP1012 thus isolating the power supply from the load
through the external FETs.
At turn-on, the gate capacitor of each external N-Channel
MOSFET is charged with a 10
μ
A current source. These
capacitors create a programmable ramp (soft turn-on). A
charge pump supplies the gate drive for the 12V supply
switch driving that gate to 17V.
The load currents pass through two external current sense
resistors. When the voltage across either resistor exceeds
the user programmed Over Current (OC) voltage threshold
value, (see Table 1) the controller enters current regulation.
At this time the time-out capacitor, C
TIM
, starts charging with
a 10
μ
A current source and the controller enters the time out
period. The length of the time out period is set by the single
external capacitor (see Table 2) placed from the C
TIM
pin
(pin 10) to ground and is characterized by a lowered gate
drive voltage to the appropriate external N-Channel
MOSFET. Once C
TIM
charges to 2V, an internal comparator
is tripped resulting in both N-Channel MOSFETs being
latched off.
Gate Turn-On Time
t
ON5V
C
VG
= 0.01
μ
F
-
5
-
ms
Gate Turn-On Current
I
ON5V
C
VG
= 0.01
μ
F
8
10
12
μ
A
3X Gate Discharge Current
3XdisI
C
VG
= 0.01
μ
F, PWRON = Low
0.5
0.75
-
A
5V Under Voltage Threshold
5V
VUV
4.35
4.5
4.65
V
3.3V Under Voltage Threshold
3.3V
VUV
2.65
2.8
2.95
V
3.3/5VG High Voltage
3/5VG
11.2
11.9
-
V
SUPPLY CURRENT AND IO SPECIFICATIONS
V
DD
Supply Current
I
VDD
4
8
10
mA
V
DD
POR Rising Threshold
9.5
10.0
10.7
V
V
DD
POR Falling Threshold
9.3
9.8
10.3
V
Current Limit Time-Out
T
ILIM
C
TIM
= 0.1
μ
F
16
20
24
ms
PWRON Pull-up Voltage
PWRN_V
PWRON pin open
1.8
2.4
3.2
V
PWRON Rising Threshold
PWR_Vth
1.1
1.5
2
V
PWRON Hysteresis
PWR_hys
0.1
0.2
0.3
V
PWRON Pull-Up Current
PWRN_I
60
80
100
μ
A
Current Limit Time-Out Threshold (C
TIM
)
C
TIM
_Vth
1.8
2
2.2
V
C
TIM
Charging Current
C
TIM
_I
8
10
12
μ
A
C
TIM
Discharge Current
C
TIM
_disI
1.7
2.6
3.5
mA
C
TIM
Pull-Up Current
C
TIM
_disI
V
CTIM
= 8V
3.5
5
6.5
mA
R
ILIM
Pin Current Source Output
R
ILIM
_Io
90
100
110
μ
A
Charge Pump Output Current
Qpmp_Io
C
PUMP
= 0.1
μ
F, C
PUMP
= 16V
320
560
800
μ
A
Charge Pump Output Voltage
Qpmp_Vo
No load
17.2
17.4
-
V
Charge Pump Output Voltage - Loaded
Qpmp_VIo
Load current = 100
μ
A
16.2
16.7
-
V
Charge Pump POR Rising Threshold
Qpmp+Vth
15.6
16
16.5
V
Charge Pump POR Falling Threshold
Qpmp-Vth
15.2
15.7
16.2
V
Electrical Specifications
V
DD
= 12V, C
VG
= 0.01
μ
F, C
TIM
= 0.1
μ
F, R
SENSE
= 0.1
, C
BULK
= 220
μ
F, ESR = 0.5
, T
A
= T
J
= 0
o
C to 70
o
C,
Unless Otherwise Specified
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
HIP1012, HIP1012A
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