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| 型號： | HIF_SPEC |
| 英文描述： | EZ-030 Demonstration Board Theory of Operation Host Interface (HIF) Specification |
| 中文描述： | 易- 030演示板的經(jīng)營理論主機(jī)接口（誘導(dǎo)因子）規(guī)格 |
| 文件頁數(shù)： | 90/118頁 |
| 文件大?。?/td> | 356K |
| 代理商： | HIF_SPEC |
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3–66
Host Interface (HIF) Specification
90
The most complex handlers will be those needing to return to the user
program at the C level of context. If the handler intends to pass control to a
user-provided signal routine (e.g., to handle SIGINT), then it may be
necessary to preserve all the registers indicated in Figure 3–1. In addition,
handlers intending to return control at the C level of context will need to
make a provision for completing any interrupted SPILL or FILL operations
or complete a long-jump that may be in progress. Fortunately, AMD
supplies the necessary code in library routines supplied with most tool
products.
Before execution of the signal handler, the HIF is responsible for clearing the
Channel Control (CHC) register (setting it to 0), to prevent restarting a load or
store multiple operation that may have been interrupted. The proper contents
of this register will be restored by the HIF when the handler issues one of the
service requests listed in Table 3–7.
Table 3–7. Signal Return Services
Service
Name
Description
322
sigdfl
Perform default signal handling
323
sigret
Return to location indicated by PC1
324
sigrep
Return to location indicated by PC2
325
sigskp
Return to location indicated by PC0
Once a signal handler is invoked by one of the signals listed in Table 3–6, and
when it has finished, it will usually return to the HIF by invoking one of the
signal return services shown in Table 3–7, with register
gr125
pointing to the
last saved register in the HIF-saved registers (i.e.,
gr121
), as shown in
Figure 3–1. More complex implementations may make other arrangements for
returning to the user program’s context. Sample code for saving and restoring
the necessary registers is included in AMD development tool products.
The handler is responsible for determining the appropriate action for each type
of interrupt (SIGINT or SIGFPE) and must return control to the HIF using one
of the services listed in Table 3–7, after first restoring the indirect pointers
(IPA–IPC), the Q register, and with
gr125
pointing to the last saved register in
the user’s stack (assuming the suggested approach for preserving registers is
followed).
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