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參數(shù)資料
| 型號(hào)： | HI-8282CM-03 |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| 中文描述： | 1 CHANNEL(S), 125K bps, SERIAL COMM CONTROLLER, CDIP40 |
| 封裝： | ROHS COMPLIANT, SIDE BRAZED, CERAMIC, DIP-40 |
| 文件頁(yè)數(shù)： | 4/14頁(yè) |
| 文件大?。?/td> | 448K |
| 代理商： | HI-8282CM-03 |
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HI-8282
RECEIVER LOGICOPERATION
BITTIMING
BITRATE
PULSERISETIME
PULSEFALLTIME
PULSEWIDTH
Figure2showsablockdiagramofthelogicsectionofeach receiver.
The ARINC 429 specification contains the following timing
specificationforthereceiveddata:
100KBPS±1%
1.5±0.5μsec
1.5±0.5μsec
5μsec±5%
12K-14.5KBPS
10±5μsec
10±5μsec
34.5to41.7μsec
Again the HI-8282 accepts signals that meet these specifications
and rejects outside the tolerances.
achievesthisisdescribedbelow:
The way the logic operation
1. Keytothe performanceof thetimingchecking logic isanac-
curate 1MHz clock source.
recommmended.
Less than 0.1% error is
2. The sampling shift registers are 10 bits long and must show
three consecutive Ones, Zeros or Nulls to be considered valid
data. Additionally,fordatabits,theOne orZerointheupperbits
of the sampling shift registers must be followed by a Null in the
lowerbitswithinthedatabittime.
three consecutive Nulls must be found in both the upper and
lowerbitsofthesamplingshift register. In this manner the mini-
mumpulsewidthisguaranteed.
For a Null in the word gap,
HIGHSPEED
LOWSPEED
FUNCTIONAL DESCRIPTION (con't)
3. Each data bit must follow its predecessor by not less than
8 samples and no more than 12 samples. In this manner the
bit rate is checked. With exactly 1MHz input clock frequency,
theacceptabledatabitratesareasfollows:
83KBPS
125KBPS
10.4KBPS
15.6KBPS
4. The Word Gap timer samples the Null shift register every
10 input clocks (80 for low speed) after the last data bit of a
validreception. IftheNullispresent,theWordGapcounter is
incremented. Acountof3willenablethenextreception.
The receiver parity circuit counts Ones received, including the
parity bit, ARINC bit 32. If the result is odd, then "0" will appear in
the32ndbit.
HIGHSPEED
LOWSPEED
DATABITRATEMIN
DATABITRATEMAX
RECEIVERPARITY
RETRIEVINGDATA
Once 32 valid bits are recognized, the receiver logic generates
an End of Sequence (EOS). If the receiver decoder is enabled
and the 9th and 10th ARINC bits match the control word
program bits or if the receiver decoder is disabled, then EOS
clocksthedatareadyflagflipfloptoa"1",
will golow. Thedataflagforareceiverwillremain lowuntil after
ARINC bytes from that receiver are retrieved.
accomplished by activating
to retrieve the first byte and activating
retrievethesecondbyte.
retrievesdatafromreceiver1and
retrievesdatafromreceiver2.
EN2
or
(orboth)
This is
with SEL, the byte selector, low
with SEL high to
EN
If another ARINC word is received, and a new EOS occurs
before the twobytes are retrieved,the datais overwrittenbythe
newword.
D/R1
D/R2
EN
ENI
both
SEL
EN
D/R
DEBITS
/
CMUX
CLATCH
32 TO 16 DRIVER
32 BIT LATCH
32 BIT SHIFT REGISTER
TO PINS
BIT BD14
CLOCK
CLOCK
CLK
CAND
SEND OF
PARITY
BIT
DATA
BIT CLOCK
EOS
WORD GAP
WTIMER
BIT CLOCK
END
START
CONTROL
ERROR
CLOCK
DERROR
SHIFT REGISTER
SHIFT REGISTER
NULL
ZEROS
SHIFT REGISTER
ONES
EOS
BITS 9 & 10
FIGURE 2.
RECEIVER BLOCK DIAGRAM
HOLT INTEGRATED CIRCUITS
4-32
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-8282C | 256 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-8282CT | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-8282PQI | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-8282PQT | 256 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-8282S | 256 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI-8282CT | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-8282J-44 | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-8282JF-44 | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-8282JT-44 | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-8282JTF-44 | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
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