參數(shù)資料
型號(hào): HF88S05(S)
文件頁數(shù): 5/13頁
文件大?。?/td> 277K
代理商: HF88S05(S)
Command Mode SRAM HF88S05
-5-
02/07/01
6.
Function Block Diagram
Several registers are used in the interface logic. The functions of the registers are described
below and their initial values are as indicated in the following table.
S
TPP
TPH
TPL
TP[15..0]
S
S
XOR
C
D
Static
RAM
ARRAY
D
DIN[7..0]
S2P
P
MUX
+ 1
DOUT[7..0]
C
CHKSUM
MUX
R
64Kx8
MUX
The Table Pointer register keeps the address of SRAM being written to or read from. It will
automatically increment by one with each read/write access, but remains unchanged when
writing command or reading checksum.
Register
TPL
TPH
TPP
Checksum
Type Description
W Address register 0 for A7 ~ A0
W Address register 1 for A15 ~ A8
W Address register 2 for A23 ~ A16
R
XOR checksum of data
Initial Value
“--------“
“--------“
“--------“
“--------“
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