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| 型號： | HE84G761B |
| 廠商： | King Billion Electronics Co., Ltd. |
| 英文描述： | 8-BIT MICRO-CONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 49/60頁 |
| 文件大?。?/td> | 594K |
| 代理商： | HE84G761B |
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KING BILLION ELECTRONICS CO., LTD
駿
億
電
子
股
份
有
限
公
司
HE84G761B
HE80004 Series
April 25, 2005
This specification is subject to change without notice. Please contact sales person for the latest version before use.
49
V0.92
RATE
BAUD
FCK
DIVISOR
RATE
BAUD
_
*
16
_
_
=
, (
FCK: fast clock of system
)
The contents of BRH and BRL are calculated by the following two formulas:
BRL =
DIVISOR
RATE
BAUD
_
_
% 256
BRH = (
DIVISOR
RATE
BAUD
_
_
– BRL) / 256
The “%” symbol is the modulus operation (reminder of division). For example, if the FCK is 1.8432M Hz
and the desired baud rate is 2400 baud, then
48
2400
*
16
1843200
_
_
=
=
DIVISOR
RATE
BAUD
The BRL register shall be set to 0x30 and BRH set to 0x00. The setting of baud_rate_divisor is not
updated until the BRH register is written. Thus user is strongly recommended to write BRL first, then
BRH.
In order to obtain good communication quality, the same time base shall be used in the both sides of
transmitting and receiving. The following table shows the most common baud rate setting used in the PC
UART communication.
BRL and BRH: Baud Rate Control Registers
FCK(Hz) Baud Rate (bps)
1.8432M
50
1.8432M
300
1.8432M
1200
1.8432M
2400
1.8432M
4800
1.8432M
9600
1.8432M
19200
1.8432M
38400
1.8432M
57600
1.8432M
115200
21.3.
Interrupt & Identification Register
Divisor
2304
384
96
48
24
12
6
3
2
1
BRL
0x00
0x80
0x60
0x30
0x18
0x0C
0x06
0x03
0x02
0x01
BRH
0x09
0x01
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
This high nibble of IEIR register allows to enable/disable interrupt generation by the UART, the low
nibble ID[2..0] of IEIR register is used to identify the source of interrupts.
Address
0x02h
RBRI: Receiver Buffer Register Interrupt (1 = Enable, 0 = Disable), related to ID[1] bit.
THRI: Transmitter Hold Register Interrupt (1 = Enable, 0 = Disable), related to ID[0] bit.
RLSI: Receiver Line Status Interrupt (1 = Enable, 0 = Disable), related to ID[2] bit.
Name
IEIR
Bit 7
0
-
Bit 6
RLSI
R/W
Bit 5
THRI
R/W
Bit 4
RBRI
R/W
Bit 3
0
-
Bit 2
ID2
R
Bit 1
ID1
R
Bit 0
ID0
R
Reset Value
“0000_0000”
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