參數(shù)資料
型號(hào): HDSP-253X
英文描述: Eight Character 5 mm Smart Alphanumeric Display
中文描述: 八字5毫米智能字符顯示
文件頁(yè)數(shù): 9/16頁(yè)
文件大?。?/td> 417K
代理商: HDSP-253X
9
Character RAM
This RAM stores either ASCII character data or a UDC RAM
address.
Flash RAM
This is a 1 x 8 RAM which stores Flash data.
User-Defined Character RAM
(UDC RAM)
This RAM stores the dot pattern for custom characters.
User-Defined Character
Address Register
(UDC Address Register)
This register is used to provide the address to the UDC RAM when
the user is writing or reading a custom character.
Control Word Register
This register allows the user to adjust the display brightness, flash
individual characters, blink, self test or clear the display.
driving of eight 5 x 7 dot matrix
characters. The major user
accessible portions of the display
are listed below:
Flash RAM, a 128 character ASCII
decoder, a 16 character UDC
RAM, a UDC Address Register, a
Control Word Register and the
refresh circuitry necessary to
synchronize the decoding and
Display Internal Block
Diagram
Figure 1 shows the internal block
diagram of the HDSP-253X
display. The CMOS IC consists of
an 8 byte Character RAM, an 8 bit
Character Ram
Figure 2 shows the logic levels
needed to access the
HDSP-253X Character RAM.
During a normal access the CE =
“0” and either RD = “0” or WR =
“0”. However, erroneous data may
be written into the Character RAM
if the Address lines are unstable
when CE = “0” regardless of the
logic levels of the RD or WR lines.
Address lines A
0
-A
2
are used to
select the location in the Charac-
ter RAM. Two types of data can
be stored in each Character RAM
location: an ASCII code or a UDC
RAM address. Data bit D
7
is used
to differentiate between the ASCII
character and a UDC RAM
address. D
7
= 0 enables the ASCII
decoder and D
7
= 1 enables the
UDC RAM. D
0
-D
6
are used to
input ASCII data and D
0
-D
3
are
used to input a UDC address.
Figure 2. Logic Levels to Access the Character RAM.
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