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參數(shù)資料
| 型號： | HDSP-253X |
| 英文描述： | Eight Character 5 mm Smart Alphanumeric Display |
| 中文描述： | 八字5毫米智能字符顯示 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 417K |
| 代理商： | HDSP-253X |
11
Table 2. Current Requirements at Different Brightness Levels
for All Colors Except AlGaAs
%
V
DD
= 5.0 V
25
°
C Typ.
Symbol
D
2
0
0
0
0
1
1
1
D
1
0
0
1
1
0
0
1
D
0
0
1
0
1
0
1
0
Brightness
Units
I
DD
(V)
100
80
53
40
27
20
13
200
160
106
80
54
40
26
mA
mA
mA
mA
mA
mA
mA
Figure 5. Logic Levels to Access the Flash RAM.
Control Word Register
Figure 6 shows how to access the
Control Word Register. This is an
eight bit register which performs
five functions. They are
Brightness control, Flash RAM
control, Blinking, Self Test and
Clear. Each function is
independent of the others. How-
ever, all bits are updated during
each Control Word write cycle.
Brightness (Bits 0-2)
Bits 0-2 of the Control Word
adjust the brightness of the
display. Bits 0-2 are interpreted
as a three bit binary code with
code (000) corresponding to
maximum brightness and code
(111) corresponding to a blanked
display. In addition to varying the
display brightness, bits 0-2 also
vary the average value of I
DD
. I
DD
can be calculated at any
brightness level by multiplying
the percent brightness level by
the value of I
DD
at the 100%
brightness level. These values of
I
DD
are shown in Table 2.
Flash Function (Bit 3)
Bit 3 determines whether the
flashing character attribute is on
or off. When bit 3 is a “1,” the
output of the Flash RAM is
checked. If the content of a loca-
tion in the Flash RAM is a “1,” the
associated digit will flash at
approximately 2 Hz. For an
external clock, the blink rate can
be calculated by dividing the
clock frequency by 28,672. If the
flash enable bit of the Control
Word is a “0,” the content of the
Flash RAM is ignored. To use this
function with multiple display
systems see the Reset section.
Blink Function (Bit 4)
Bit 4 of the Control Word is used
to synchronize blinking of all
eight digits of the display. When
this bit is a “1” all eight digits of
the display will blink at approxi-
mately 2 Hz. The actual rate is
dependent on the clock frequency.
For an external clock, the blink
rate can be calculated by dividing
the clock frequency by 28,672.
This function will override the
Flash function when it is active.
To use this function with multiple
display systems see the Reset
section.
Figure 6. Logic Levels to Access the Control Word Register
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