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參數(shù)資料
| 型號： | HDMP-1034A |
| 英文描述： | 1.4 GBd Receiver Chip with CIMT Encoder/Decoder and Variable Data Rate |
| 中文描述： | 1.4 GBd接收芯片與CIMT編碼器/解碼器和可變數(shù)據(jù)速率 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大小： | 177K |
| 代理商： | HDMP-1034A |
10
Figure 10. O-PECL and I-PECL Simplified Circuit Schematic.
Figure 9. O-LVTTL and I-LVTTL Simplified Circuit Schematic.
INTERNAL
1.4 V
REFERENCE
GND
V
CC
ESD
PROTECTION
GND
V
CC
O_LVTTL
I_LVTTL
GND
ESD
PROTECTION
V
CC
V
CC
HS_OUT
0.01 μF
0.01 μF
V
CC
HS
GND
ESD
PROTECTION
-TO_NODE
+TO_NODE
GND
+FM_NODE
-FM_NODE
ESD
PROTECTION
+
–
+
–
HS_IN
2
*
Z0 = 150
V
CC
GND
GND
V
CC
NOTE:
1. HS_IN INPUTS SHOULD NEVER BE CONNECTED TO GROUND AS PERMANENT DAMAGE TO THE DEVICE MAY RESULT.
Z0 = 75
Z0 = 75
75
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