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參數(shù)資料
| 型號(hào)： | HD404326 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-bit HMCS400-series microcomputer(4位單片微計(jì)算機(jī)) |
| 中文描述： | 4位HMCS400系列微電腦（4位單片微計(jì)算機(jī)） |
| 文件頁數(shù)： | 52/94頁 |
| 文件大?。?/td> | 573K |
| 代理商： | HD404326 |
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HD404328 Series
52
Write operations are valid from the second instruction execution cycle, so the STS instruction must be
executed after at least two cycles have been executed. The serial mode register is initialized to $0 by MCU
reset.
Serial mode register (SMR): $005
3
2
1
0
Transmit clock selection
R1 /
SCK
pin mode selection
SMR
Bit 3
0
R1 /
SCK
Pin
1
R1 port input or output pin
SCK
input or output pin
SMR
Bit 2
Bit 1
Bit 0
R1 /
SCK
Pin
0
Clock Source
Prescaler Division
Ratio
Transmit Clock
Period
0
0
1
0
1
0
1
0
1
0
1
1
0
1
SCK
output
SCK
output
SCK
output
SCK
output
SCK
output
SCK
output
SCK
output
SCK
input
Prescaler
Prescaler
Prescaler
Prescaler
Prescaler
Prescaler
System clock
External clock
÷
2048
÷
512
÷
128
÷
32
÷
8
÷
2
—
—
4096 t
1024 t
256 t
64 t
16 t
4 t
1 t
—
cyc
cyc
cyc
cyc
cyc
cyc
cyc
Note: t = 1.9074
μ
s (with 4.1943-MHz crystal oscillator used at 1/8 division ratio)
Initial value: 0000,
R/W: W
Figure 30 Serial Mode Register
Serial Data Register (SRL: $006, SRU: $007):
Eight-bit read/write register separated into upper and
lower digits located at sequential addresses. Data in this register is output from the SO pin, LSB first, in
synchronism with the falling edge of the transmit clock; and data is input, LSB first, through the SI pin at
the rising edge of the transmit clock. Input/output timing is shown in figure 31.
Data cannot be read or written during serial data transmission. If a read/write occurs during transmission,
the accuracy of the resultant data cannot be guaranteed.
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