參數(shù)資料
型號： HC4046
廠商： System Logic Semiconductor Co., Ltd.
英文描述： Phase-Locked Loop
中文描述： 鎖相環(huán)
文件頁數(shù)： 6/12頁
文件大?。?/td> 134K
代理商： HC4046
SL74HC4046
S ystem Logic
Semiconductor
SLS
[VCO Section]
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND) - continued
V
CC
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
25
°
C to
-55
°
C
≤
85
°
C
≤
125
°
C
Unit
I
IN
Maximum Input
Leakage Current INH,
VCO
IN
V
IN
=V
cc
or GND
6.0
0.1
1.0
1.0
μ
A
Min
Max
Min
Max
Min
Max
V
VCOIN
Operating Voltage
Range at VCO
IN
over
the range specified for
R1; For linearity see
Fig.13A, Parallel value
of R1 and R2 should be
>2.7 k
INH= V
IL
3.0
4.5
6.0
0.1
0.1
0.1
1.0
2.5
4.0
0.1
0.1
0.1
1.0
2.5
4.0
0.1
0.1
0.1
1.0
2.5
4.0
V
R1
Resistor Range
3.0
4.5
6.0
3.0
3.0
3.0
300
300
300
3.0
3.0
3.0
300
300
300
3.0
3.0
3.0
300
300
300
k
R2
3.0
4.5
6.0
3.0
3.0
3.0
300
300
300
3.0
3.0
3.0
300
300
300
3.0
3.0
3.0
300
300
300
C1
Capacitor Range
3.0
4.5
6.0
40
40
40
No
Li-
mit
pF
[VCO Section]
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V
25
°
C to
-55
°
C
≤
85
°
C
≤
125
°
C
Unit
Min
Max
Min
Max
Min
Max
f/T
Frequency Stability with Temperature
Changes (Figures 11A,B,C)
3.0
4.5
6.0
%/K
fo
VCO Center Frequency
(Duty Factor = 50%)
(Figures 12A,B,C)
3.0
4.5
6.0
3
11
13
MHz
fVCO
VCO Frequency Linearity
3.0
4.5
6.0
See Figures 13A,B
%
VCO
Duty Factor at VCO
OUT
3.0
4.5
6.0
Typical 50%
%
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