參數(shù)資料
型號： HC4046
廠商： System Logic Semiconductor Co., Ltd.
英文描述： Phase-Locked Loop
中文描述： 鎖相環(huán)
文件頁數(shù)： 4/12頁
文件大?。?/td> 134K
代理商： HC4046
SL74HC4046
S ystem Logic
Semiconductor
SLS
[Phase Comparator Section]
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V
25
°
C to
-55
°
C
≤
85
°
C
≤
125
°
C
Unit
t
PLH
, t
PHL
Maximum Propagation Delay, SIG
IN
/COMP
IN
to
PC1
OUT
(Figure 1)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
45
ns
t
PLH
, t
PHL
Maximum Propagation Delay, SIG
IN
/COMP
IN
to
PCP
OUT
(Figure 1)
2.0
4.5
6.0
340
68
58
425
85
72
510
102
87
ns
t
PLH
, t
PHL
Maximum Propagation Delay , SIG
IN
/COMP
IN
to
PC3
OUT
(Figure 1)
2.0
4.5
6.0
270
54
46
340
68
58
405
81
69
ns
t
PLZ
, t
PHZ
Maximum Propagation Delay , SIG
IN
/COMP
IN
Output Disable Time to PC2
OUT
(Figures 2 and 3)
2.0
4.5
6.0
200
40
34
250
50
43
300
60
51
ns
t
PZL
, t
PZH
Maximum Propagation Delay , SIG
IN
/COMP
IN
Output Enable Time to PC2
OUT
(Figures 2 and 3)
2.0
4.5
6.0
230
46
39
290
58
49
345
69
59
ns
t
TLH
, t
THL
Maximum Output Transition Time (Figure 1)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
[VCO Section]
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
25
°
C to-55
°
C
≤
85
°
C
≤
125
°
C
Unit
V
IH
Minimum High-Level
Input Voltage INH
V
OUT
= 0.1 V or
V
CC
-0.1 V
I
OUT
≤
20
μ
A
3.0
4.5
6.0
2.1
3.15
4.2
2.1
3.15
4.2
2.1
3.15
4.2
V
V
IL
Maximum Low -Level
Input Voltage INH
V
OUT
=0.1 V or V
CC
-
0.1 V
I
OUT
≤
20
μ
A
3.0
4.5
6.0
0.90
1.35
1.8
0.90
1.35
1.8
0.90
1.35
1.8
V
V
OH
Minimum High-Level
Output Voltage
VCO
OUT
V
IN
=V
IH
or V
IL
I
OUT
≤
20
μ
A
3.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
IN
= V
IH
or V
IL
I
OUT
≤
4.0 mA
I
OUT
≤
5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.7
5.2
V
OL
Maximum Low-Level
Output Voltage
VCO
OUT
V
IN
=V
IH
or V
IL
I
OUT
≤
20
μ
A
3.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
IN
= V
IH
or V
IL
I
OUT
≤
4.0 mA
I
OUT
≤
5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.4
0.4
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