參數(shù)資料
型號(hào): GTL2107PW
廠商: NXP Semiconductors N.V.
元件分類: 電壓/頻率轉(zhuǎn)換
英文描述: 12-bit GTL--GTL-GTL+ to LVTTL translator
封裝: GTL2107PW<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<Always Pb-free,;GTL2107PW<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1&l
文件頁數(shù): 1/19頁
文件大?。?/td> 181K
代理商: GTL2107PW
1.
General description
The GTL2107 is a customized translator between dual Xeon processors, GTL
/GTL/GTL+
I/O and the Platform Health Management, South Bridge and Power Supply 3.3 V LVTTL
and GTL signals.
2.
Features
Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver
Operates at GTL, GTL+ or GTL
levels
EN1 and EN2 enable control
3.0 V to 3.6 V operation
LVTTL I/O not 5 V tolerant
Series termination on the LVTTL outputs of 30
Ω
ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 Class II, Level A which exceeds
500 mA
Package offered: TSSOP28
3.
Quick reference data
GTL2107
12-bit GTL
/GTL/GTL+ to LVTTL translator
Rev. 05 — 23 December 2009
Product data sheet
Table 1.
T
amb
= 25
°
C.
Symbol
V
ref
= 0.73 V; V
TT
= 1.1 V
t
PLH
LOW to HIGH
propagation delay
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
nA to nBI; see
Figure 4
nBI to nA or nAO (open-drain outputs); see
Figure 13
nA to nBI; see
Figure 4
nBI to nA or nAO (open-drain outputs); see
Figure 13
1
2
2
2
4
13
5.5
4
8
18
10
10
ns
ns
ns
ns
t
PHL
HIGH to LOW
propagation delay
V
ref
= 0.76 V; V
TT
= 1.2 V
t
PLH
LOW to HIGH
propagation delay
nA to nBI; see
Figure 4
nBI to nA or nAO (open-drain outputs); see
Figure 13
nA to nBI; see
Figure 4
nBI to nA or nAO (open-drain outputs); see
Figure 13
1
2
2
2
4
13
5.5
4
8
18
10
10
ns
ns
ns
ns
t
PHL
HIGH to LOW
propagation delay
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