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參數(shù)資料
| 型號： | GTL2010BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 其它接口 |
| 英文描述： | 10-bit bidirectional low voltage translator |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, DSO24 |
| 封裝： | 4 X 4 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-616-1, HVQFN-24 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 117K |
| 代理商： | GTL2010BS |
GTL2010_6
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 3 March 2008
5 of 20
NXP Semiconductors
GTL2010
10-bit bidirectional low voltage translator
8.
Application design-in information
8.1 Bidirectional translation
For the bidirectional clamping configuration, higher voltage to lower voltage or lower
voltage to higher voltage, the GREF input must be connected to DREF and both pins
pulled to HIGH side V
CC
through a pull-up resistor (typically 200 k
). A filter capacitor on
DREF is recommended. The processor output can be totem pole or open-drain (pull-up
resistors may be required) and the chip set output can be totem pole or open-drain
(pull-up resistors are required to pull the Dn outputs to V
CC
). However, if either output is
totem pole, data must be unidirectional or the outputs must be 3-stateable and the outputs
must be controlled by some direction control mechanism to prevent HIGH-to-LOW
contentions in either direction. If both outputs are open-drain, no direction control is
needed. The opposite side of the reference transistor (SREF) is connected to the
processor core power supply voltage. When DREF is connected through a 200 k
resistor
to a 3.3 V to 5.5 V V
CC
supply and SREF is set between 1.0 V to (V
CC
1.5 V), the output
of each Sn has a maximum output voltage equal to SREF and the output of each Dn has
a maximum output voltage equal to V
CC
.
Typical bidirectional voltage translation.
Fig 4.
Bidirectional translation to multiple higher voltage levels such as an I
2
C-bus
application
GREF
DREF
002aac060
D1
D2
200 k
CHIPSET I/O
V
CC
5 V
totem pole or
open-drain I/O
GND
SREF
S1
S2
increase bit size
by using 10-bit GTL2010
or 22-bit GTL2000
D3
D4
CHIPSET I/O
V
CC
D5
Dn
3.3 V
S3
S4
S5
Sn
CPU I/O
V
CORE
1.8 V
1.5 V
1.2 V
1.0 V
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GTL2010BS,118 | 功能描述:轉(zhuǎn)換 - 電壓電平 VOLT TRANSLATOR RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| GTL2010BS-T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:NXP bidirectional low-voltage translators |
| GTL2010DB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:VOLTAGE CLAMP|MOS|TSSOP|24PIN|PLASTIC |
| GTL2010PW | 制造商:NXP Semiconductors 功能描述:IC GTL LO-VOLT TRANSLATOR 24 制造商:NXP Semiconductors 功能描述:IC, GTL LO-VOLT TRANSLATOR, 24TSSOP 制造商:NXP Semiconductors 功能描述:IC, GTL LO-VOLT TRANSLATOR, 24TSSOP; No. of Inputs:10; Propagation Delay:250ps; Supply Voltage Min:2.3V; Supply Voltage Max:2.7V; Logic Case Style:TSSOP; No. of Pins:24; Logic Type:Bidirectional Low Voltage Translator; Operating ;RoHS Compliant: Yes 制造商:NXP Semiconductors 功能描述:Voltage Level Translator GTL/GTL+ to LVTTL/TTL 24-Pin TSSOP Tube |
| GTL2010PW,112 | 功能描述:轉(zhuǎn)換 - 電壓電平 1-BIT GTL VOLTAGE CLAMP TRANS RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
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