參數(shù)資料
型號: GTL2002D
廠商: NXP Semiconductors N.V.
元件分類: 電壓/頻率轉(zhuǎn)換
英文描述: 2-bit bidirectional low voltage translator
封裝: GTL2002D/DG<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<Always Pb-free,;GTL2002D<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 5, 2
文件頁數(shù): 4/22頁
文件大小: 129K
代理商: GTL2002D
GTL2002_7
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 2 July 2009
4 of 22
NXP Semiconductors
GTL2002
2-bit bidirectional low voltage translator
6.2 Pin description
7.
Functional description
Refer to
Figure 1 “Functional diagram”
.
7.1 Function selection
[1]
GREF should be at least 1.5 V higher than SREF for best translator operation.
[2]
Sn is not pulled up or pulled down.
[3]
Sn follows the Dn input LOW.
[4]
V
TT
is equal to the SREF voltage.
[1]
GREF should be at least 1.5 V higher than SREF for best translator operation.
[2]
Dn is pulled up to V
CC
through an external resistor.
Dn follows the Sn input LOW.
[3]
[4]
V
TT
is equal to the SREF voltage.
Table 3.
Symbol
Pin description
Pin
SO8, TSSOP8,
XQFN8U
1
2
3
4
5
6
7
8
Description
VSSOP8
GND
SREF
S1
S2
D2
D1
DREF
GREF
4
1
2
3
5
6
7
8
ground (0 V)
source of reference transistor
port S1
port S2
port D2
port D1
drain of reference transistor
gate of reference transistor
Table 4.
Assuming Dn is at the higher voltage level.
H = HIGH voltage level; L = LOW voltage level; X = Don’t care.
GREF
[1]
DREF
H
H
H
H
H
H
L
L
Function selection, HIGH to LOW translation
SREF
0 V
V
TT
[4]
V
TT
[4]
0 V
V
TT
[4]
Input Dn
X
H
L
X
Output Sn
X
V
TT
[2][4]
L
[3]
X
Transistor
off
on
on
off
Table 5.
Assuming Dn is at the higher voltage level.
H = HIGH voltage level; L = LOW voltage level; X = Don’t care.
GREF
[1]
DREF
H
H
H
H
H
H
L
L
Function selection, LOW to HIGH translation
SREF
0 V
V
TT
[4]
V
TT
[4]
0 V
V
TT
[4]
Input Sn
X
V
TT
[4]
L
X
Output Dn
X
H
[2]
L
[3]
X
Transistor
off
nearly off
on
off
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