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參數(shù)資料
| 型號： | GS9022A |
| 英文描述： | Serializer for SDI at 270-360Mb/s with Cable Driver |
| 中文描述： | 串行器在270 - 360Mb / s的的SDI電纜驅(qū)動器 |
| 文件頁數(shù)： | 19/30頁 |
| 文件大?。?/td> | 445K |
| 代理商： | GS9022A |
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6.0 RESET
Setting the RESET input pin LOW re-initializes the internal
control circuitry including returning all HOST interface
programming values to their original default values. An
internal power-on-reset cell is also present in the device so
that device initialization occurs on power-up. Figure 16a
illustrates the reset circuitry. The internal power-on reset
circuit of the GS9020A is sensitive to the rise time of the
power supply, hence an external power on reset chip or
board level reset line is strongly recommended. When
using this technique, the user must ensure that a minimum
pulse width of 100ns is present on the reset line.
In applications where a board-level reset is not available, a
circuit similar to figure 16b can be used to ensure correct
reset on power-up. The RESET pin will typically take 1.4ms
to reach 2.5V on power up, but can take longer for power
supplies with slower rise times. A bleed resistor such as
the one shown (20k) will assist the capacitor to discharge
once power is removed. The user should allow the
capacitor to discharge to at least 0.5V before power is
reapplied, to permit a full internal reset. The time taken by
the RESET pin to reach 0.5V on power down, is dependent
upon the fall time of the power supply.
PIN
LOGIC OPR
HOST BIT
RESET
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