參數(shù)資料
型號: GS881E36T-100
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
中文描述: 256K X 36 CACHE SRAM, 12 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 8/34頁
文件大?。?/td> 487K
代理商: GS881E36T-100
Rev: 1.10 9/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
8/34
2000, Giga Semconductor, Inc.
Preliminary
GS881E18/36T-11/11.5/100/80/66
Mode Pin Functions
Note:
There are pull-up devices on the LBO, DP and FT pins and a pull down device on the ZZ pin, so those input pins can be unconnected and the
chip will operate in the default states as specified in the above table.
Burst Counter Sequences
Linear Burst Sequence
BPR 1999.05.18
Mode Name
Pin Name
State
L
H or NC
L
H or NC
L or NC
Function
Linear Burst
Interleaved Burst
Flow Through
Pipeline
Active
Standby, I
DD
= I
SB
Check for Odd Parity
Check for Even Parity
Burst Order Control
LBO
Output Register Control
FT
Power Down Control
ZZ
H
ByteSafe Data Parity Control
DP
L
H or NC
Note: The burst counter wraps to initial state on the 5th clock.
I
nterleaved Burst Sequence
Note: The burst counter wraps to initial state on the 5th clock.
A[1:0]
A[1:0]
A[1:0]
A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
A[1:0]
A[1:0]
A[1:0]
A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
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相關代理商/技術參數(shù)
參數(shù)描述
GS881E36T-100I 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
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GS881E36T-11.5I 制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
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