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| 型號(hào)： | GS88136T-66 |
| 英文描述： | x36 Fast Synchronous SRAM |
| 中文描述： | x36快速同步SRAM |
| 文件頁(yè)數(shù)： | 9/33頁(yè) |
| 文件大?。?/td> | 616K |
| 代理商： | GS88136T-66 |
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Rev: 1.10 7/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
9/33
2000, Giga Semconductor, Inc.
Preliminary
GS88118/36T-11/11.5/100/80/66
Synchronous Truth Table
Operation
Address
Used
State
Diagram
Key
5
E1
E2
2
(x36only)
ADSP ADSC
ADV
W
3
DQ
4
Deselect Cycle, Power
Down
Deselect Cycle, Power Down
Deselect Cycle, Power
Down
Read Cycle, Begin Burst
Read Cycle, Begin Burst
Write Cycle, Begin Burst
Read Cycle, Continue Burst
Read Cycle, Continue Burst
Write Cycle, Continue Burst
Write Cycle, Continue Burst
Read Cycle, Suspend Burst
Read Cycle, Suspend Burst
Write Cycle, Suspend Burst
Write Cycle, Suspend Burst
Note:
1.
X = Dont Care, H = High, L = Low.
2.
For x36 Version, E = T (True) if E2 = 1; E = F (False) if E2 = 0.
3.
W = T (True) and F (False) is defined in the Byte Write Truth Table preceding.
4.
G is an asynchronous input. G can be driven high at any time to disable active output drivers. G low can only enable active driv-
ers (shown as “Q” in the Truth Table above).
None
X
H
X
X
L
X
X
High-Z
None
X
L
F
L
X
X
X
High-Z
None
X
L
F
H
L
X
X
High-Z
External
External
External
Next
Next
Next
Next
Current
Current
Current
Current
R
R
W
CR
CR
CW
CW
L
L
L
X
H
X
H
X
H
X
H
T
T
T
X
X
X
X
X
X
X
X
L
H
H
H
X
H
X
H
X
H
X
X
L
L
H
H
H
H
H
H
H
H
X
X
X
L
L
L
L
H
H
H
H
X
F
T
F
F
T
T
F
F
T
T
Q
Q
D
Q
Q
D
D
Q
Q
D
D
5.
All input combinations shown above are tested and supported. Input combinations shown in gray boxes need not be used to
accomplish basic synchronous or synchronous burst operations and may be avoided for simplicity.
Tying ADSP high and ADSC low allows simple non-burst synchronous operations. See
BOLD
items above.
Tying ADSP high and ADV low while using ADSC to load new addresses allows simple burst operations. See
ITALIC
items
above.
6.
7.
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| GS88136T-66I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Synchronous SRAM |
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