參數(shù)資料
型號(hào)： GS8162V36AGD-350T
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 512K X 36 CACHE SRAM, 4.5 ns, PBGA165
封裝： 13 X 15 MM, 1 MM PITCH, FBGA-165
文件頁(yè)數(shù)： 22/37頁(yè)
文件大?。?/td> 947K
代理商： GS8162V36AGD-350T
Rev: 1.00a 6/2003
29/37
2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS8162V18A(B/D)/GS8162V36A(B/D)/GS8162V72A(C)
Preliminary
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
1
RFU
011
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
1
RFU
110
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1. Instruction codes expressed in binary, MSB on left, LSB on right.
2. Default instruction automatically loaded at power-up and in test-logic-reset state.
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