***
Genesis Microchip Confidential ***
gm5110/20 Preliminary Data Sheet
June 2002
41
C5110-DAT-01C
Table 21. DC Characteristics
PARAMETER
SYMBOL
POWER
P
5110
P
5120
P
LP
V
VDD_3.3
V
VDD_2.5
I
5110
I
5110_2.5_VDD
I
5110_2.5_AVDD
I
5110_3.3_VDD
I
5110_3.3_AVDD
MIN
TYP
MAX
UNITS
Power Consumption @ 96 MHz (gm5110)
Power Consumption @ 135 MHz (gm5120)
Power Consumption @ Low Power Mode
(1)
3.3V Supply Voltages (AVDD and RVDD)
2.5V Supply Voltages (VDD and CVDD)
Supply Current @ CLK = 96 MHz (gm5110)
2.5V digital supply
(2)
2.5V analog supply
(3)
3.3V digital supply
(4)
3.3V analog supply
(5)
Supply Current @ CLK =135MHz (gm5120)
2.5V digital supply
(2)
2.5V analog supply
(3)
3.3V digital supply
(4)
3.3V analog supply
(5)
Supply Current @ Low Power Mode*
1.5
1.8
0.15
3.3
2.5
400
W
W
W
V
V
mA
3.15
2.35
3.45
2.65
360
(6)
40
(6)
50
(6)
150
(6)
I
5120
I
5120_2.5_VDD
I
5120_2.5_AVDD
I
5120_3.3_VDD
I
5120_3.3_AVDD
500
500
(6)
50
(6)
60
(6)
150
(6)
mA
I
LP
50
mA
INPUTS
V
IH
V
IL
V
IHC
V
ILC
I
IH
I
IL
C
IN
OUTPUTS
V
OH
V
OL
I
OZ
High Voltage
Low Voltage
Clock High Voltage
Clock Low Voltage
High Current (V
IN
= 5.0 V)
Low Current (V
IN
= 0.8 V)
Capacitance (V
IN
= 2.4 V)
2.0
GND
2.4
GND
-25
-25
V
DD
0.8
V
DD
0.4
25
25
8
V
V
V
V
μ
A
μ
A
pF
High Voltage (I
OH
= 7 mA)
Low Voltage (I
OL
= -7 mA)
Tri-State Leakage Current
2.4
GND
-25
V
DD
0.4
25
V
V
μ
A
NOTE (1):
Low power figures result from setting the ADC, DVI, and clock power down bits so that only the micro-controller is running.
NOTE (2):
Includes pins CVDD_2.5, VDD1_ADC_2.5, VDD2_ADC_2.5, VDD_RX0_2.5, VDD_RX1_2.5 and VDD_RX2_2.5.
NOTE (3):
Includes only VDD_RXPLL_2.5.
NOTE (4):
Includes pins VDD_DPLL, VDD_SDDS, VDD_DDDS and RVDD.
NOTE (5):
Includes pins AVDD_RED, AVDD_GREEN, AVDD_BLUE, AVDD_IMB, AVDD_RX0, AVDD_RX1, AVDD_RX2,
AVDD_RXC, AVDD_RPLL, AVDD_SDDS and AVDD_DDDS.
NOTE (6):
Maximum current figures are provided for the purposes of selecting an appropriate power supply circuit.
5
5
.
.
2
2
P
P
r
r
e
e
l
l
i
i
m
i
i
n
n
a
a
r
r
y
y
A
A
C
C
C
C
h
h
a
a
r
r
a
a
c
c
t
t
e
e
r
r
i
i
s
s
t
t
i
i
c
c
s
s
The following targeted specifications have been derived by simulation.
All timing is measured to a 1.5V logic-switching threshold. The minimum and maximum
operating conditions used were:
T
DIE
= 0 to 125
°
C, Vdd = 2.35 to 2.65V, Process = best to worst, C
L
=
16pF for all outputs.