***
Genesis Microchip Confidential ***
gm5110/20 Preliminary Data Sheet
June 2002
36
C5110-DAT-01C
interface). Install a 10K pull-up resistor to indicate a ‘1’, otherwise a ‘0’ is indicated because
ROM_ADDR[15:0] have a 60K
internal pull-down resistor.
Signal Name
Pin Name
Description
HOST_ADDR(6:0)
HOST_PROTOCOL
HOST_PORT_EN
OCM_START
ROM_ADDR(6:0)
ROM_ADDR7
ROM_ADDR8
ROM_ADDR9
If using 2-wire host protocol, these are the serial bus device address.
Program this bit to 0 for 2-wire host interface operation.
Program this bit to 0 for 2-wire host interface operation.
Determines the operating condition of the OCM after HW reset:
0 = OCM remains in reset until enabled by register bit.
1 = OCM becomes active after OCM_CLK is stable.
These settings are available for reading from a status register but are otherwise unused by the
gm5110/20. Used to allow the OCM or external MCU access configuration settings.
Selects reference clock source (refer to Figure 7):
0 = XTAL and TCLK pins are connected to a crystal oscillator.
1 = TCLK input is driven with a single-ended TTL/CMOS clock oscillator.
Together with OCM_CONTROL register (0x22) bit 4, this bit selects internal/external ROM
configuration.
0 = All 48K of ROM is internal.
1 = All 48K of ROM is in external ROM using ROM_ADDR15:0 address outputs if
register 0x22 bit 4 is 0. If register 0x22 bit 4 is 1, 0-32K ROM is internal, and
32K~48K ROM is external using ROM_ADDR13:0 address outputs.
USER_BITS(7:5)
ROM_ADDR(12:10)
OSC_SEL
ROM_ADDR13
OCM_ROM_CNFG(1)
ROM_ADDR14
Table 18. Bootstrap Signals
4
4
.
.
1
1
6
6
H
H
o
o
s
s
t
t
I
I
n
n
t
t
e
e
r
r
f
f
a
a
c
c
e
e
A serial host interface is provided to allow an external device to peek and poke registers in
the gm5110/20. This is done using a 2-wire serial protocol. Note that 2-wire host interface
requires bootstrap settings as described in Table 18.
The 2-wire host interface is suitable for connection to a factory interrogation port. This is
illustrated in Figure 26. The factory test station connects to the gm5110/20 through the Direct
Data Channel (DDC) of the DSUB15 or DVI connectors. For example, the PC can make
gm5110/20 display test patterns (see section 4.5). A camera can be used to automate the
calibration of the LCD panel.
DDC
Device-Under-Test
Factory Test Station
Camera
Figure 26.
Factory Calibration and Test Environment
An arbitration mechanism ensures that register accesses from the OCM and the 2-wire host
interface port are always serviced (time division multiplexing).