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參數(shù)資料
| 型號： | FIN12ACMLX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) |
| 中文描述： | LINE TRANSCEIVER, PQCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, MO-220WHHD-4, MLP-32 |
| 文件頁數(shù)： | 9/21頁 |
| 文件大?。?/td> | 1819K |
| 代理商： | FIN12ACMLX |
Preliminary
9
www.fairchildsemi.com
F
Application Mode Diagrams
Modes 1, 2, 3: Unidirectional Data Transfer
FIGURE 8. Simplified Block Diagram for Unidirectional Serializer and Deserializer
Figure shows the basic operation diagram when a pair of
SerDes is configured in an unidirectional operation mode.
Master Operation:
The device will...
(Please refer to Figure )
1. During power-up the device will be configured as a
serializer based on the value of the DIRI signal.
2. Accept CKREF_M word clock and generate a bit clock
with embedded word boundary. This bit clock will be
sent to the slave device through the CKSO port.
3. Receive parallel data on the rising edge of
STROBE_M.
4. Generate and transmit serialized data on the DS sig-
nals which is source synchronous with CKSO.
5. Generate an embedded word clock for each strobe sig-
nal.
Slave Operation:
The device will...
1. Be configured as a deserializer at power-up based on
the value of the DIRI signal.
2. Accept an embedded word boundary bit clock on CKSI.
3. Deserialize the DS Data stream using the CKSI input
clock.
4. Write parallel data onto the DP_S port and generate
the CKP_S. CKP_S will only be generated when a valid
data word occurs.
FIGURE 9. Unidirectional Serializer and Deserializer
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