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參數(shù)資料
| 型號： | FIN1218MTD |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | LVDS 21-Bit Serializers/De-Serializers |
| 中文描述： | TRIPLE LINE RECEIVER, PDSO48 |
| 封裝： | 6.10 MM, MO-153, TSSOP-48 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大?。?/td> | 434K |
| 代理商： | FIN1218MTD |
2004 Fairchild Semiconductor Corporation
DS500876
www.fairchildsemi.com
October 2003
Revised October 2004
F
FIN1217
FIN1218
FIN1215
FIN1216
LVDS 21-Bit Serializers/De-Serializers
General Description
The FIN1217 and FIN1215 transform 21-bit wide parallel
LVTTL (Low Voltage TTL) data into 3 serial LVDS (Low
Voltage Differential Signaling) data streams. A phase-
locked transmit clock is transmitted in parallel with the data
stream over a separate LVDS link. Every cycle of transmit
clock 21 bits of input LVTTL data are sampled and trans-
mitted.
The FIN1218 and FIN1216 receive and convert the 3 serial
LVDS data streams back into 21 bits of LVTTL data. Refer
to Table 1 for a matrix summary of the Serializers and De-
serializers available. For the FIN1217, at a transmit clock
frequency of 85 MHz, 21 bits of LVTTL data are transmitted
at a rate of 595 Mbps per LVDS channel.
These chipsets are an ideal solution to solve EMI and
cable size problems associated with wide and high-speed
TTL interfaces.
Features
I
Low power consumption
I
20 MHz to 85 MHz shift clock support
I
50% duty cycle on the clock output of receiver
I
±
1V common-mode range around 1.2V
I
Narrow bus reduces cable size and cost
I
High throughput (up to 1.785 Gbps throughput)
I
Up to 595 Mbps per channel
I
Internal PLL with no external component
I
Compatible with TIA/EIA-644 specification
I
Devices are offered in 48-lead TSSOP packages
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Order Number
FIN1215MTD
FIN1216MTD
FIN1217MTD
FIN1218MTD
Package Number
MTD48
MTD48
MTD48
MTD48
Package Description
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FIN12ACGFX | Low Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) |
| FIN12AC | Low Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) |
| FIN12ACMLX | Low Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) |
| FIN1531M | 5V LVDS 4-Bit High Speed Differential Driver |
| FIN1531MTC | 5V LVDS 4-Bit High Speed Differential Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FIN1218MTD_Q | 功能描述:功率驅(qū)動器IC LVDS 21-Bit RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時間: 下降時間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| FIN1218MTDX | 功能描述:LVDS 接口集成電路 LVDS 21-Bit RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| FIN12AC | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) |
| FIN12AC_06 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:uSerDes Low-Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges |
| FIN12AC_08 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low-Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges |
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