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參數(shù)資料
| 型號： | FIN1049MTC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | LVDS Dual Line Driver with Dual Line Receiver |
| 中文描述： | DUAL LINE TRANSCEIVER, PDSO16 |
| 封裝： | 4.40 MM, MO-153, TSSOP-16 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 319K |
| 代理商： | FIN1049MTC |
www.fairchildsemi.com
4
F
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 5:
All typical values are at T
A
=
25
°
C and with V
CC
=
3.3V.
Note 6:
t
SK(LH)
, t
SK(HL)
is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same
direction.
Note 7:
t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Note 8:
f
MAX
generator input conditions: t
r
=
t
f
<
1ns (10% to 90%), 50% duty cycle, 0V to 3V. Output criteria: duty cycle
=
45% / 55%, V
OD
>
250mV, all chan-
nels switch.
Note 9:
f
MAXT
generator input conditions: t
r
=
t
f
<
1ns (10% to 90%), 50% duty cycle, V
ID
=
200mV, V
CM
=
1.2V. Output criteria: duty cycle
=
45% / 55%, V
OH
>
2.7V. V
OL
<
0.25V, all channels switching.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 5)
Switching Characteristics - LVDS Outputs
t
PLHD
t
PHLD
t
TLHD
t
THLD
t
SK(P)
t
SK(LH)
,
t
SK(HL)
t
SK(PP)
t
PZHD
t
PZLD
t
PHZD
t
PLZD
f
MAXD
Differential Propagation Delay LOW-to-HIGH
See Figures 3, 4
2.0
ns
Differential Propagation Delay HIGH-to-LOW
Differential Output Rise Time (20% to 80%)
Differential Output Fall Time (80% to 20%)
2.0
1.0
1.0
ns
ns
ns
0.2
0.2
Pulse Skew |t
PLH
- t
PHL
|
Channel-to-Channel Skew (Note 6)
0.35
ns
0.35
ns
Part-to-Part Skew (Note 7)
Differential Output Enable Time from Z-to-HIGH
Differential Output Enable Time from A-to-LOW
1.0
6.0
6.0
ns
ns
ns
See Figures 5, 6
Differential Output Disable Time from HIGH-to-Z
Differential Output Disable Time from LOW-to-Z
Maximum Frequency (Note 8)
3.0
3.0
ns
ns
MHz
See Figure 3
200
Switching Characteristics - LVTTL Outputs
Measured from 20% to 80% signal
V
ID
=
200mV;
Distributed Load
C
L
=
15pF and 50
;
R
L
=
1K
;
V
OS
=
1.2V;
See Figures 7, 8
t
PHL
t
PLH
t
SK1
t
SK2
t
SK3
t
LHR
t
HLR
t
PHZ
t
PLZ
t
PZH
t
PZL
f
MAXT
Propagation Delay HIGH-to-LOW
Propagation Delay LOW-to-HIGH
0.5
0.5
1.0
1.0
3.5
3.5
ns
ns
Pulse Skew
Channel-to-Channel Skew
Part-to-Part Skew
0.0
0.0
0.0
35.0
50.0
400
500
1.0
ps
ps
ns
Transition Time LOW-to-HIGH
Transition Time HIGH-to-LOW
Disable Time HIGH-to-Z
0.1
0.1
2.2
0.25
0.18
4.5
1.4
1.4
8.0
ns
ns
ns
See Figures 9, 10
Disable Time LOW-to-Z
Enable Time Z-to-HIGH
Enable Time Z-to-LOW
1.3
1.8
0.9
3.5
3.0
1.4
8.0
7.0
7.0
ns
ns
ns
Maximum Frequency (Note 9)
See Figure 7
200
MHz
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