參數資料
型號: FIN1049MTC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: LVDS Dual Line Driver with Dual Line Receiver
中文描述: DUAL LINE TRANSCEIVER, PDSO16
封裝: 4.40 MM, MO-153, TSSOP-16
文件頁數: 3/10頁
文件大?。?/td> 319K
代理商: FIN1049MTC
3
www.fairchildsemi.com
F
Absolute Maximum Ratings
(Note 2)
Recommended Operating
Conditions
Note 2:
The
Absolute Maximum Ratings
: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3:
All typical values are at T
A
=
25
°
C and with V
CC
=
3.3V.
Note 4:
Both driver and receiver inputs are static. All LVDS outputs have 100
load. None of the outputs have any lumped capacitive load.
Supply Voltage (V
CC
)
LVDS DC Input Voltage (V
IN
)
LVDS DC Output Voltage (V
OUT
)
Driver Short Circuit Current (I
OSD
)
Storage Temperature Range (T
STG
)
Max Junction Temperature (T
J
)
Lead Temperature (T
L
)
(Soldering, 10 seconds)
ESD (Human Body Model)
ESD (Machine Model)
0.5V to
+
4.6V
0.5V to
+
4.6V
0.5V to
+
4.6V
Continuous 10mA
65
°
C to
+
150
°
C
150
°
C
260
°
C
>
7000V
>
250V
Supply Voltage (V
CC
)
Magnitude of Differential Voltage
(|V
ID
|)
Operating Temperature (T
A
)
3.0V to 3.6V
100mV to V
CC
40
°
C to
+
85
°
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
LVDS Input DC Specifications (R
IN1
+
, R
IN1
, R
IN2
+
, R
IN2
) See Figure 1 and Table 1
Differential Input Threshold HIGH
VCM
=
1.2V, 0.05V, 2.35V
Differential Input Threshold LOW
V
ID
=
100mV, V
CC
=
3.3V
Input Current
V
CC
=
0V or 3.6V, V
IN
=
0V or 2.8V
CMOS/ LVTTL Input DC Specifications (EN, ENb, D
IN1
, D
IN2
)
Input High Voltage (LVTTL)
Input Low Voltage (LVTTL)
Input Current
V
IN
=
0V or V
CC
(EN, ENb, D
IN1
, D
IN2
, R
INx
+
, and
R
INx
)
Input Clamp Voltage
V
IK
=
18mA
LVDS Output DC Specifications (D
OUT1
+
, D
OUT1
, D
OUT2
+
, D
OUT2
)
Output Differential Voltage
V
OD
Magnitude Change from
R
L
=
100
,
Differential LOW-to-HIGH
Driver Enabled,
Offset Voltage
See Figure 2
Offset Magnitude Change from
V
TH
V
TL
V
IC
I
IN
0.0
0.0
35.0
mV
mV
100
V
ID
/2
Common Mode Voltage Range
V
CC
(V
ID
/2)
±
20.0
V
mA
V
IH
V
IL
I
IN
2.0
GND
V
CC
0.8
V
V
±
20.0
μ
A
V
IK
1.5
0.7
V
V
OD
V
OD
250
350
450
mV
35.0
mV
V
OS
V
OS
1.125
1.25
1.375
V
25.0
mV
Differential LOW-to-HIGH
I
OS
I
OSD
I
OFF
I
OZD
Short Circuit Output Current
D
OUT
+
=
0V & D
OUT
=
0V, Driver Enabled
V
OD
=
0V, Driver Enabled
V
CC
=
0V, V
OUT
=
0V or V
CC
Driver Disabled, D
OUT
+
=
0V or V
CC
or D
OUT
=
0V or V
CC
CMOS/LVTTL Output DC Specifications (R
OUT1
, R
OUT2
)
I
OH
=
2mA, V
ID
=
200mV
I
OL
=
2mA, V
ID
=
200mV
Driver Disabled, R
OUTn
=
0V or V
CC
Drivers Enabled, Any Valid Input Condition
Drivers Disabled
9.0
9.0
±
20.0
mA
mA
μ
A
Power-Off Input or Output Current
Disabled Output Leakage Current
±
10.0
μ
A
V
OH
V
OL
I
OZ
I
CC
I
CCZ
C
IND
C
OUT
C
INT
Output High Voltage
Output Low Voltage
2.7
V
V
μ
A
mA
mA
0.250
±
10.0
25.0
10.0
Disabled Output Leakage Current
Power Supply Current (Note 4)
Power Supply Current
Input Capacitance
Output Capacitance
Input Capacitance
LVDS Input
LVDS Output
LVTTL Input
3.0
4.0
3.5
pF
pF
pF
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