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| 型號： | EVAL-ADUC841QSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 67/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEV FOR ADUC841 QUICK START |
| 產(chǎn)品培訓(xùn)模塊： | Process Control |
| 標(biāo)準包裝： | 1 |
| 系列： | QuickStart™ 套件 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | ADuC841 |
| 所含物品： | 評估板、電源、纜線、軟件和說明文檔 |
| 產(chǎn)品目錄頁面： | 739 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | ADUC841BCPZ62-3-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP ADUC841BCPZ62-5-ND - IC MCU 62K FLASH ADC/DAC 56LFCSP ADUC841BCPZ8-3-ND - IC MCU 8KB FLASH ADC/DAC 56LFCSP ADUC841BCPZ8-5-ND - IC MCU 8KB FLASH ADC/DAC 56LFCSP ADUC841BSZ62-5-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP ADUC841BSZ62-3-ND - IC ADC/DAC 12BIT W/MCU 52-MQFP |
| 其它名稱： | EVAL-ADUC841QS EVAL-ADUC841QS-ND |
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ADuC841/ADuC842/ADuC843
Rev. 0 | Page 7 of 88
1 Temperature Range –40°C to +85°C.
2 ADC linearity is guaranteed during normal MicroConverter core operation.
3 ADC LSB size = VREF/212, i.e., for internal VREF = 2.5 V, 1 LSB = 610 V, and for external VREF = 1 V, 1 LSB = 244 V.
4 These numbers are not production tested but are supported by design and/or characterization data on production release.
5 Offset and gain error and offset and gain error match are measured after factory calibration.
6 Based on external ADC system components, the user may need to execute a system calibration to remove additional external channel errors to achieve these
specifications.
7 SNR calculation includes distortion and noise components.
8 Channel-to-channel crosstalk is measured on adjacent channels.
9 The temperature monitor gives a measure of the die temperature directly; air temperature can be inferred from this result.
10 DAC linearity is calculated using:
Reduced code range of 100 to 4095, 0 V to VREF range.
Reduced code range of 100 to 3945, 0 V to VDD range.
DAC output load = 10 k and 100 pF.
11 DAC differential nonlinearity specified on 0 V to VREF and 0 V to VDD ranges.
12 DAC specification for output impedance in the unbuffered case depends on DAC code.
13 DAC specifications for ISINK, voltage output settling time, and digital-to-analog glitch energy depend on external buffer implementation in unbuffered mode. DAC in
unbuffered mode tested with OP270 external buffer, which has a low input leakage current.
14 Measured with CREF pin decoupled with 0.47 F capacitor to ground. Power-up time for the internal reference is determined by the value of the decoupling capacitor
chosen for the CREF pin.
15 When using an external reference device, the internal band gap reference input can be bypassed by setting the ADCCON1.6 bit.
16 Flash/EE memory reliability characteristics apply to both the Flash/EE program memory and the Flash/EE data memory.
17 Endurance is qualified to 100,000 cycles as per JEDEC Std. 22 method A117 and measured at –40°C, +25°C, and +85°C. Typical endurance at 25°C is 700,000 cycles.
18 Retention lifetime equivalent at junction temperature (TJ) = 55°C as per JEDEC Std. 22 method A117. Retention lifetime based on an activation energy of 0.6 eV derates
with junction temperature as shown in Figure 38 in the Flash/EE Memory Reliability section.
19 Power supply current consumption is measured in normal, idle, and power-down modes under the following conditions:
Normal Mode:
Reset = 0.4 V, digital I/O pins = open circuit, Core Clk changed via CD bits in PLLCON (ADuC842/ADuC843), core executing internal
software loop.
Idle Mode:
Reset = 0.4 V, digital I/O pins = open circuit, Core Clk changed via CD bits in PLLCON (ADuC842/ADuC843), PCON.0 = 1, core execution
suspended in idle mode.
Power-Down Mode:
Reset = 0.4 V, all Port 0 pins = 0.4 V, All other digital I/O and Port 1 pins are open circuit, Core Clk changed via CD bits in PLLCON
(ADuC842/ADuC843), PCON.0 = 1, core execution suspended in power-down mode, OSC turned on or off via OSC_PD bit (PLLCON.7) in
PLLCON SFR (ADuC842/ADuC843).
20 DVDD power supply current increases typically by 3 mA (3 V operation) and 10 mA (5 V operation) during a Flash/EE memory program or erase cycle.
21 Power supply currents are production tested at 5.25 V and 3.3 V for a 5 V and 3 V part, respectively.
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| EVAL-ADUC842QS | 功能描述:KIT DEV FOR ADUC842 QUICK START RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ 套件 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| EVAL-ADUC842QS1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| EVAL-ADUC842QSP1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| EVAL-ADUC842QSP2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| EVAL-ADUC842QSPZ | 功能描述:KIT DEV QUICK START ADUC842 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 標(biāo)準包裝:1 系列:PICDEM™ 類型:MCU 適用于相關(guān)產(chǎn)品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，線纜，元件，CD，PICkit 編程器 產(chǎn)品目錄頁面:659 (CN2011-ZH PDF) |
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