- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄17031 > EVAL-AD7612CBZ (Analog Devices Inc)BOARD EVALUATION FOR AD7612 PDF資料下載
參數(shù)資料
| 型號(hào)： | EVAL-AD7612CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 9/32頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7612 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 750k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 輸入范圍： | ±5 V，±10 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 205mW @ 750kSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7612 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD7612BSTZ-RL-ND - IC ADC 16BIT 750KSPS SAR 48-LQFP AD7612BCPZ-RL-ND - IC ADC 16BIT 750KSPS SAR 48LFCSP AD7612BSTZ-ND - IC ADC 16BIT 750KSPS SAR 48-LQFP AD7612BCPZ-ND - IC ADC 16BIT 750KSPS SAR 48LFCSP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)當(dāng)前第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)
Data Sheet
AD7612
Rev. A | Page 17 of 32
THEORY OF OPERATION
SWA
SWB
IN+
REF
REFGND
LSB
MSB
32,768C
IN–
16,384C
4C
2C
C
65,536C
CONTROL
LOGIC
SWITCHES
CONTROL
BUSY
OUTPUT
CODE
CNVST
COMP
06
26
5-
02
5
Figure 25. ADC Simplified Schematic
OVERVIEW
The AD7612 is a very fast, low power, precise, 16-bit analog-to-
digital converter (ADC) using successive approximation capacitive
digital-to-analog (CDAC) architecture.
The AD7612 can be configured at any time for one of four input
ranges and conversion mode with inputs in parallel and serial
hardware modes or by a dedicated write only, SPI-compatible
interface via a configuration register in serial software mode.
The AD7612 uses Analog Device’s patented iCMOS high voltage
process to accommodate 0 to 5 V, 0 to 10 V, ±5 V, and ±10 V
input ranges without the use of conventional thin films. Only
one acquisition cycle, t8, is required for the inputs to latch to the
correct configuration. Resetting or power cycling is not
required for reconfiguring the ADC.
The AD7612 features different modes to optimize performance
according to the applications. It is capable of converting 750,000
samples per second (750 kSPS) in warp mode, 600 kSPS in normal
mode, and 500 kSPS in impulse mode.
The AD7612 provides the user with an on-chip track-and-hold,
successive approximation ADC that does not exhibit any pipe-
line or latency, making it ideal for multiple multiplexed channel
applications.
For unipolar input ranges, the AD7612 typically requires three
supplies; VCC, AVDD (which can supply DVDD), and OVDD
which can be interfaced to either 5 V, 3.3 V, or 2.5 V digital logic.
For bipolar input ranges, the AD7612 requires the use of the
additional VEE supply.
The device is housed in Pb-free, 48-lead LQFP or tiny LFCSP
7 mm × 7 mm packages that combine space savings with flexi-
bility. In addition, the AD7612 can be configured as either a
parallel or serial SPI-compatible interface.
CONVERTER OPERATION
The AD7612 is a successive approximation ADC based on a
charge redistribution DAC. Figure 25 shows the simplified
schematic of the ADC. The CDAC consists of two identical
arrays of 16 binary weighted capacitors, which are connected
to the two comparator inputs.
During the acquisition phase, terminals of the array tied to the
comparator’s input are connected to AGND via SW+ and SW.
All independent switches are connected to the analog inputs.
Thus, the capacitor arrays are used as sampling capacitors and
acquire the analog signal on IN+ and IN inputs. A conversion
phase is initiated once the acquisition phase is complete and the
CNVST input goes low. When the conversion phase begins, SW+
and SW are opened first. The two capacitor arrays are then
disconnected from the inputs and connected to the REFGND
input. Therefore, the differential voltage between the inputs
(IN+ and IN) captured at the end of the acquisition phase is
applied to the comparator inputs, causing the comparator to
become unbalanced. By switching each element of the capacitor
array between REFGND and REF, the comparator input varies
by binary weighted voltage steps (VREF/2, VREF/4 through VREF/
65536). The control logic toggles these switches, starting with
the MSB first, in order to bring the comparator back into a
balanced condition.
After the completion of this process, the control logic generates
the ADC output code and brings the BUSY output low.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UVZ1J222MHD | CAP ALUM 2200UF 63V 20% RADIAL |
| STD17W-H | WIRE & CABLE MARKERS |
| EVAL-AD7715-3EBZ | BOARD EVALUATION FOR AD7715 |
| MLG1005S0N3C | INDUCTOR MULTILAYER 0.3NH 0402 |
| DC1500A-C | BOARD SAR ADC LTC2391-16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7612EDZ | 功能描述:BOARD EVAL FOR AD7612 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7621CB2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 2 LSB INL, 3 MSPS PulSAR?? ADC |
| EVAL-AD7621CB-U1 | 制造商:Analog Devices 功能描述:EVAL FOR AD7621 - Bulk |
| EVAL-AD7621CBZ | 制造商:Analog Devices 功能描述:BOARD EVALUATION FOR AD7621 |
| EVAL-AD7621EDZ | 功能描述:BOARD EVAL FOR AD7321 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。