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參數(shù)資料
型號： EVAL-AD7612CBZ
廠商： Analog Devices Inc
文件頁數(shù)： 24/32頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD7612
標(biāo)準(zhǔn)包裝： 1
系列： PulSAR®
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 750k
數(shù)據(jù)接口： 串行，并聯(lián)
輸入范圍： ±5 V，±10 V
在以下條件下的電源（標(biāo)準(zhǔn)）： 205mW @ 750kSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD7612
已供物品： 板
相關(guān)產(chǎn)品： AD7612BSTZ-RL-ND - IC ADC 16BIT 750KSPS SAR 48-LQFP
AD7612BCPZ-RL-ND - IC ADC 16BIT 750KSPS SAR 48LFCSP
AD7612BSTZ-ND - IC ADC 16BIT 750KSPS SAR 48-LQFP
AD7612BCPZ-ND - IC ADC 16BIT 750KSPS SAR 48LFCSP
AD7612
Data Sheet
Rev. A | Page 30 of 32
SCIN
SCCLK
WARP
START
TEN
123
67
BUSY
HW/SW = 0
INVSCLK = 0
CNVST
SCCS
t8
t36
t35
t37
4
PD
5
BIPOLAR
IMPULSE
OB/2C
X
89
SER/PAR = 1
BIP = 0 OR 1
TEN = 0 OR 1
IMPULSE = 0 OR 1
WARP = 0 OR 1
PD = 0
t33
t34
t31
X
t31
06
26
5-
0
45
Figure 45. Serial Configuration Port Timing
MICROPROCESSOR INTERFACING
The AD7612 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and ac signal processing
applications interfacing to a digital signal processor. The AD7612
is designed to interface with a parallel 8-bit or 16-bit wide
interface, or with a general-purpose serial port or I/O ports on a
microcontroller. A variety of external buffers can be used with
the AD7612 to prevent digital noise from coupling into the ADC.
SPI Interface
The AD7612 is compatible with SPI and QSPI digital hosts and
DSPs such as Blackfin ADSP-BF53x and ADSP-218x/ADSP-219x.
Figure 46 shows an interface diagram between the AD7612 and
the SPI-equipped ADSP-219x. To accommodate the slower speed
of the DSP, the AD7612 acts as a slave device, and data must be
read after conversion. This mode also allows the daisy-chain
feature. The convert command could be initiated in response to
an internal timer interrupt.
The reading process can be initiated in response to the end-of-
conversion signal (BUSY going low) using an interrupt line of
the DSP. The serial peripheral interface (SPI) on the ADSP-219x
is configured for master mode (MSTR) = 1, clock polarity bit
(CPOL) = 0, clock phase bit (CPHA) = 1, and SPI interrupt enable
(TIMOD) = 0 by writing to the SPI control register (SPICLTx).
It should be noted that to meet all timing requirements, the SPI
clock should be limited to 17 Mbps allowing it to read an ADC
result in less than 1 μs. When a higher sampling rate is desired,
use one of the parallel interface modes.
BUSY
CS
SDOUT
SCLK
CNVST
AD76121
PFx
SPIxSEL (PFx)
MISOx
SCKx
PFx OR TFSx
ADSP-219x1
1ADDITIONAL PINS OMITTED FOR CLARITY.
DVDD
SER/PAR
EXT/INT
RD
INVSCLK
06
26
5-
0
46
Figure 46. Interfacing the AD7612 to SPI Interface
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