參數(shù)資料
型號(hào)： EVAL-AD7324CBZ
廠商： Analog Devices Inc
文件頁數(shù)： 20/37頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD7324CBZ
標(biāo)準(zhǔn)包裝： 1
系列： iCMOS®
ADC 的數(shù)量： 1
位數(shù)： 12
采樣率（每秒）： 1M
數(shù)據(jù)接口： 串行
輸入范圍： ±10 V
在以下條件下的電源（標(biāo)準(zhǔn)）： 30mW @ 1MSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD7324
已供物品： 板
相關(guān)產(chǎn)品： AD7324BRUZ-REEL-ND - IC ADC 12BIT+SAR 4CHAN 16-TSSOP
AD7324BRUZ-REEL7-ND - IC ADC 12BIT+ SAR 4CHAN 16TSSOP
AD7324BRUZ-ND - IC ADC 12BIT+ SAR 4CHAN 16TSSOP
AD7324
Data Sheet
Rev. B | Page 26 of 36
If a change to the range register is required during a sequence, it
is necessary to first stop the sequence by writing to the control
register and setting Seq1 to 0 and Seq2 to 0. Next, the write to
the range register should be completed to change the required
range. The previously selected sequence should then be initiated
again by writing to the control register and setting Seq1 to 0 and
Seq2 to 1. The ADC converts on the first channel in the sequence.
The AD7324 can be configured to convert a sequence of
consecutive channels (see Figure 45). This sequence begins by
converting on Channel 0 and ends with a final channel as
selected by Bit ADD1 to Bit ADD0 in the control register. In
this configuration, there is no need for a write to the sequence
register. To operate the AD7324 in this mode, set Seq1 to 1 and
Seq2 to 0 in the control register, and then select the final channel
in the sequence by programming Bit ADD1 to Bit ADD0 in the
control register.
Once the control register is configured to operate the AD7324
in this mode, the DIN line can be held low, or the write bit can
be set to 0. To return to traditional multichannel operation, a
write to the control register to set Seq1 to 0 and Seq2 to 0 is
necessary.
When the Seq1 and Seq2 are both set to 0, or when both are set
to 1, the AD7324 is configured to operate in traditional multi-
channel mode, where a write to Channel Address Bit ADD1 to
Bit ADD0 in the control register selects the next channel for
conversion.
04864-
032
DIN: WRITE TO RANGE REGISTER TO SELECT THE RANGE
FOR ANALOG INPUT CHANNELS.
DOUT: CONVERSION RESULT FROM CHANNEL 0, ±10V
RANGE, SINGLE-ENDED MODE.
CS
DIN: WRITE BIT = 0 OR DIN LINE HELD LOW TO CONTINUE
THROUGH SEQUENCE OF CONSECUTIVE CHANNELS.
DOUT: CONVERSION RESULT FROM CHANNEL 1,
RANGE SELECTED IN RANGE REGISTER.
CS
DIN: WRITE BIT = 0 OR DIN LINE HELD LOW TO CONTINUE TO
CONVERT THROUGH THE SEQUENCE OF
CONSECUTIVE CHANNELS.
DOUT: CONVERSION RESULT FROM CHANNEL 0,
RANGE SELECTED IN RANGE REGISTER.
CS
DIN: WRITE TO CONTROL REGISTER TO SELECT THE FINAL
CHANNEL IN THE CONSECUTIVE SEQUENCE, SET Seq1 = 1
AND Seq2 = 0. SELECT OUTPUT CODING FOR SEQUENCE.
DOUT: CONVERSION RESULT FROM CHANNEL 0,
RANGE SELECTED IN RANGE REGISTER,
SINGLE-ENDED MODE.
CS
POWER ON.
DIN TIED LOW/WRITE BIT = 0.
CONTINUOUSLY CONVERT
ON CONSECUTIVE SEQUENCE
OF CHANNELS.
DIN: WRITE TO CONTROL
REGISTER TO STOP THE
SEQUENCE, Seq1 = 0, Seq2 = 0.
DOUT: CONVERSION RESULT
FROM CHANNEL IN SEQUENCE.
CS
STOPPING
A SEQUENCE.
Figure 45. Flowchart for Consecutive Sequence of Channels
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