參數(shù)資料
型號(hào)： EVAL-AD7323CBZ
廠商： Analog Devices Inc
文件頁數(shù)： 9/37頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR AD7323CBZ
標(biāo)準(zhǔn)包裝： 1
系列： iCMOS®
ADC 的數(shù)量： 1
位數(shù)： 12
采樣率（每秒）： 500k
數(shù)據(jù)接口： 串行
輸入范圍： ±10 V
在以下條件下的電源（標(biāo)準(zhǔn)）： 17mW @ 500kSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD7323
已供物品： 板
相關(guān)產(chǎn)品： AD7323BRUZ-REEL-ND - IC ADC 12BIT+SAR 4CHAN 16-TSSOP
AD7323BRUZ-REEL7-ND - IC ADC 12BIT+ SAR 4CHAN 16TSSOP
AD7323BRUZ-ND - IC ADC 12BIT+ SAR 4CHAN 16TSSOP
AD7323
Data Sheet
Rev. B | Page 16 of 36
THEORY OF OPERATION
CIRCUIT INFORMATION
The AD7323 is a fast, 4-channel, 12-bit plus sign, bipolar input,
serial ADC. The AD7323 can accept bipolar input ranges that
include ±10 V, ±5 V, and ±2.5 V; it can also accept a 0 V to
+10 V unipolar input range. A different analog input range can
be programmed on each analog input channel via the on-chip
registers. The AD7323 has a high speed serial interface that can
operate at throughput rates up to 500 kSPS.
The AD7323 requires VDD and VSS dualsupplies for the high voltage
analog input structures. These supplies must be equal to or greater
than the largest analog input range selected. See Table 6 for the
requirements of these supplies for each analog input range. The
AD7323 requires a low voltage 2.7 V to 5.25 V VCC supply to
power the ADC core.
Table 6. Reference and Supply Requirements for Each
Analog Input Range
Selected
Analog Input
Range (V)
Reference
Voltage (V)
Full-Scale
Input
Range (V)
VCC (V)
Minimum
VDD/VSS(V)1
±10
2.5
±10
3/5
±10
3.0
±12
3/5
±12
±5
2.5
±5
3/5
±5
3.0
±6
3/5
±6
±2.5
2.5
±2.5
3/5
±5
3.0
±3
3/5
±5
0 to +10
2.5
0 to +10
3/5
+10/AGND
3.0
0 to +12
3/5
+12/AGND
1
Guaranteed performance for VDD = 12 V to 16.5 V and VSS = 12 V to 16.5 V.
The performance specifications are guaranteed for VDD = 12 V
to 16.5 V and VSS = 12 V to 16.5 V. With VDD and VSS supplies
outside this range, the AD7323 is fully functional but performance
is not guaranteed. It may be necessary to decrease the throughput
rate when the AD7323 is configured with the minimum VDD and
VSS supplies (see the Typical Performance Characteristics section).
Figure 31 shows the change in THD as the VDD and VSS supplies
are reduced. For ac performance at the maximum throughput
rate, the THD degrades slightly as VDD and VSS are reduced. It may
therefore be necessary to reduce the throughput rate when using
minimum VDD and VSS supplies so that there is less degradation
of THD and the specified performance can be maintained. The
degradation is due to an increase in the on resistance of the
input multiplexer when the VDD and VSS supplies are reduced.
Figure 18 and Figure 19 show the change in INL and DNL as
the VDD and VSS voltages are varied. For dc performance when
operating at the maximum throughput rate, as the VDD and VSS
supply voltages are reduced, the typical INL and DNL error
remains constant.
The analog inputs can be configured as four single-ended
inputs, two true differential inputs, two pseudo differential
inputs, or three pseudo differential inputs. Selection can be
made by programming the mode bits, Mode 0 and Mode 1,
in the control register.
The serial clock input accesses data from the part and provides
the clock source for the successive approximation ADC. The
AD7323 has an on-chip 2.5 V reference. However, the AD7323
can also work with an external reference. On power-up, the
external reference operation is the default option. If the internal
reference is the preferred option, the user must write to the
reference bit in the control register to select the internal refer-
ence operation.
The AD7323 also features power-down options to allow power
savings between conversions. The power-down modes are
selected by programming the on-chip control register, as
described in the Modes of Operation section.
CONVERTER OPERATION
The AD7323 is a successive approximation ADC built around
two capacitive DACs. Figure 23 and Figure 24 show simplified
schematics of the ADC in single-ended mode during the acquisi-
tion and conversion phases, respectively. Figure 25 and Figure 26
show simplified schematics of the ADC in differential mode
during acquisition and conversion phases, respectively. The
ADC is composed of control logic, a SAR, and capacitive DACs.
In Figure 23 (the acquisition phase), SW2 is closed and SW1 is
in Position A, the comparator is held in a balanced condition,
and the sampling capacitor array acquires the signal on the input.
CAPACITIVE
DAC
CONTROL
LOGIC
COMPARATOR
AGND
SW2
SW1
A
B
CS
VINx
05400-
017
Figure 23. ADC Acquisition Phase (Single-Ended)
When the ADC starts a conversion (see Figure 24), SW2 opens
and SW1 moves to Position B, causing the comparator to become
unbalanced. The control logic and the charge redistribution
DAC are used to add and subtract fixed amounts of charge from
the capacitive DAC to bring the comparator back into a balanced
condition. When the comparator is rebalanced, the conversion
is complete. The control logic generates the ADC output code.
CAPACITIVE
DAC
CONTROL
LOGIC
COMPARATOR
AGND
SW2
SW1
A
B
CS
VINx
05400-
018
Figure 24. ADC Conversion Phase (Single-Ended)
相關(guān)PDF資料
PDF描述
VI-B6N-EY CONVERTER MOD DC/DC 18.5V 50W
ABC07DREF CONN EDGECARD 14POS .100 EYELET
ECC50DJWN CONN EDGECARD 100POS .100X.200
VI-B6M-EY CONVERTER MOD DC/DC 10V 50W
EVAL-AD7725CBZ BOARD EVALUATION FOR AD7725
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-AD7324CB 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC
EVAL-AD7324CBZ 功能描述:BOARD EVALUATION FOR AD7324CBZ RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:iCMOS® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件
EVAL-AD7327CB 制造商:AD 制造商全稱:Analog Devices 功能描述:500 kSPS, 8-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC
EVAL-AD7327CBZ 功能描述:BOARD EVALUATION FOR AD7327 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:iCMOS® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件
EVAL-AD7327SDZ 功能描述:BOARD EVAL FOR AD7327SDZ RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:* 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*