參數(shù)資料
型號： EVAL-AD5382EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 26/40頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD5382
產品培訓模塊： DAC Architectures
標準包裝： 1
DAC 的數(shù)量： 32
位數(shù)： 14
采樣率（每秒）： 125k
數(shù)據(jù)接口： DSP，I²C，MICROWIRE?，并行，QSPI?，SPI?
設置時間： 8µs
DAC 型： 電壓
工作溫度： -40°C ~ 85°C
已供物品： 板，CD
已用 IC / 零件： AD5382
其它名稱： Q4391457
AD5382
Data Sheet
Rev. C | Page 32 of 40
AD5382 to PIC16C6x/7x
The PIC16C6x/7x synchronous serial port (SSP) is configured as
an SPI master with the Clock Polarity bit = 0. This is done by
writing to the synchronous serial port control register (SSPCON).
See the PIC16/17 Microcontroller User Manual. In this example
I/O, Port RA1 is being used to pulse SYNC and enable the serial
port of the AD5382. This microcontroller transfers only eight
bits of data during each serial transfer operation; therefore, three
consecutive read/write operations may be needed depending on
the mode. Figure 35 shows the connection diagram.
03733-036
PIC16C6X/7X1
AD53821
SDI/RC4
SDO/RC5
SCK/RC3
RA1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I2C
DVDD
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 35. AD5382-to-PIC16C6x/7x Interface
AD5382 to 8051
The AD5382 requires a clock synchronized to the serial data.
The 8051 serial interface must therefore be operated in Mode 0.
In this mode, serial data enters and exits through RxD, and a
shift clock is output on TxD. Figure 36 shows how the 8051 is
connected to the AD5382. Because the AD5382 shifts data out
on the rising edge of the shift clock and latches data in on the
falling edge, the shift clock must be inverted. The AD5382
requires its data to be MSB first. Since the 8051 outputs the
LSB first, the transmit routine must take this into account.
03733-037
8XC511
AD53821
RxD
TxD
P1.1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I2C
DVDD
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 36. AD5382-to-8051 Interface
AD5382 to ADSP-2101/ADSP-2103
Figure 37 shows a serial interface between the AD5382 and the
ADSP-2101/ADSP-2103. The ADSP-2101/ADSP-2103 should
be set up to operate in SPORT transmit alternate framing mode.
The ADSP-2101/ADSP-2103 SPORT is programmed through
the SPORT control register and should be configured as follows:
internal clock operation, active low framing, and 16-bit word
length. Transmission is initiated by writing a word to the
Tx register after the SPORT has been enabled.
03733-038
ADSP-2101/
ADSP-21031
AD53821
DR
DT
SCK
TFS
RFS
SDO
RESET
SER/PAR
DIN
SCLK
DVDD
SPI/I2C
SYNC
1ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 37. AD5382-to-ADSP-2101/ADSP-2103 Interface
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相關代理商/技術參數(shù)
參數(shù)描述
EVAL-AD5383EB 制造商:Analog Devices 功能描述:EVAL KIT FOR 32CH, 3V/5 V, SGL-SUPPLY, 12-BIT, VOLT OUTPUT D - Bulk 制造商:Rochester Electronics LLC 功能描述:
EVAL-AD5390EB 制造商:Analog Devices 功能描述:
EVAL-AD5390EBZ 功能描述:BOARD EVALUATION FOR AD5390 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5391EB 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk 制造商:Rochester Electronics LLC 功能描述:
EVAL-AD5391EBZ 功能描述:BOARD EVALUATION FOR AD5391 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
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