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參數(shù)資料
| 型號(hào)： | EVAL-AD5061EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION AD5061 |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | nanoDAC™ |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1.3M |
| 數(shù)據(jù)接口： | 串行 |
| 設(shè)置時(shí)間： | 4µs |
| DAC 型： | 電壓 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD5061 |
AD5061
Rev. B | Page 19 of 20
USING A GALVANICALLY-ISOLATED INTERFACE
CHIP
In process control applications in industrial environments, it is
often necessary to use a galvanically-isolated interface to protect
and isolate the controlling circuitry from any hazardous
common-mode voltages that may occur in the area where the
DAC is functioning. iCoupler
provides isolation in excess of
2.5 kV. Because the AD5061 uses a 3-wire serial logic interface,
the ADuM130x family provides an ideal digital solution for the
DAC interface.
The ADuM130x isolators provide three independent isolation
channels in a variety of channel configurations and data rates.
They operate across the full range from 2.7 V to 5.5 V, providing
compatibility with lower voltage systems and enabling a voltage
translation functionality across the isolation barrier.
Figure 48 shows a typical galvanically-isolated configuration
using the AD5061. The power supply to the part also needs to
be isolated; this is accomplished by using a transformer. On the
DAC side of the transformer, a 5 V regulator provides the 5 V
supply required for the AD5061.
0.1F
10F
VDD
GND
POWER
5V
REGULATOR
AD5061
04
76
2-
03
8
ADuM130x
SCLK
V0A
V1A
SCLK
VOUT
SYNC
V0B
V1B
SDI
DIN
V0C
V1C
DATA
Figure 48. AD5061 with a Galvanically-Isolated Interface
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, it is helpful to carefully
consider the power supply and ground return layout on the
board. The printed circuit board containing the AD5061 should
have separate analog and digital sections, each having its own
area of the board. If the AD5061 is in a system where other
devices require an AGND-to-DGND connection, then the
connection should be made at one point only. This ground
point should be as close as possible to the AD5061.
The power supply to the AD5061 should be bypassed with
10 μF and 0.1 μF capacitors. The capacitors should be physically
as close as possible to the device with the 0.1 μF capacitor
ideally right up against the device. The 10 μF capacitors are the
tantalum bead type. It is important that the 0.1 μF capacitor has
low effective series resistance (ESR) and effective series
inductance (ESI), as do common ceramic types of capacitors.
This 0.1 μF capacitor provides a low impedance path to ground
for high frequencies caused by transient currents due to internal
logic switching.
The power supply line itself should have as large a trace as
possible to provide a low impedance path and reduce glitch
effects on the supply line. Clocks and other fast switching
digital signals should be shielded from other parts of the board
by digital ground. Avoid crossover of digital and analog signals,
if possible. When traces cross on opposite sides of the board,
ensure that they run at right angles to each other to reduce
feedthrough effects through the board. The best board layout
technique is the microstrip technique where the component
side of the board is dedicated to the ground plane only, and the
signal traces are placed on the solder side. However, this is not
always possible with a 2-layer board.
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