參數(shù)資料
型號(hào): EPF8482A
英文描述: Programmable Logic
中文描述: 可編程邏輯
文件頁(yè)數(shù): 61/61頁(yè)
文件大?。?/td> 979K
代理商: EPF8482A
Altera Corporation
9
FLEX 8000 Programmable Logic Device Family Data Sheet
FLEX
8000
3
Figure 4. FLEX 8000 Carry Chain Operation
Cascade Chain
With the cascade chain, the FLEX 8000 architecture can implement
functions that have a very wide fan-in. Adjacent LUTs can be used to
compute portions of the function in parallel; the cascade chain serially
connects the intermediate values. The cascade chain can use a logical AND
or logical OR (via De Morgan’s inversion) to connect the outputs of
adjacent LEs. Each additional LE provides four more inputs to the
effective width of a function, with a delay as low as 0.6 ns per LE.
LU
a1
b1
Carry
s1
LE
Register
a2
b2
Carry Chain
s2
LE
Register
Carry Chain
s
n
LE
Register
a
n
b
n
Carry Chain
Carry-Out
LE
n + 1
Register
Carry-In
LUT
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