tEABWCOMB 5.9 7.7 10.3 n" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� EPF10K50EQC240-3
寤犲晢锛� Altera
鏂囦欢闋佹暩(sh霉)锛� 74/100闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FLEX 10KE FPGA 50K 240-PQFP
鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 Three Reasons to Use FPGA's in Industrial Designs
妯欐簴鍖呰锛� 24
绯诲垪锛� FLEX-10KE®
LAB/CLB鏁�(sh霉)锛� 360
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� 2880
RAM 浣嶇附瑷堬細 40960
杓稿叆/杓稿嚭鏁�(sh霉)锛� 189
闁€鏁�(sh霉)锛� 199000
闆绘簮闆诲锛� 2.3 V ~ 2.7 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 85°C
灏佽/澶栨锛� 240-BFQFP
渚涙噳鍟嗚ō鍌欏皝瑁濓細 240-PQFP锛�32x32锛�
鍏跺畠鍚嶇ū锛� 544-1270
Altera Corporation
75
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
tEABWCOMB
5.9
7.7
10.3
ns
tEABWCREG
5.4
7.0
9.4
ns
tEABDD
3.4
4.5
5.9
ns
tEABDATACO
0.5
0.7
0.8
ns
tEABDATASU
0.8
1.0
1.4
ns
tEABDATAH
0.1
0.2
ns
tEABWESU
1.1
1.4
1.9
ns
tEABWEH
0.0
ns
tEABWDSU
1.0
1.3
1.7
ns
tEABWDH
0.2
0.3
ns
tEABWASU
4.1
5.2
6.8
ns
tEABWAH
0.0
ns
tEABWO
3.4
4.5
5.9
ns
Table 49. EPF10K100E Device Interconnect Timing Microparameters
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
tDIN2IOE
3.1
3.6
4.4
ns
tDIN2LE
0.3
0.4
0.5
ns
tDIN2DATA
1.6
1.8
2.0
ns
tDCLK2IOE
0.8
1.1
1.4
ns
tDCLK2LE
0.3
0.4
0.5
ns
tSAMELAB
0.1
0.2
ns
tSAMEROW
1.5
2.5
3.4
ns
tSAMECOLUMN
0.4
1.0
1.6
ns
tDIFFROW
1.9
3.5
5.0
ns
tTWOROWS
3.4
6.0
8.4
ns
tLEPERIPH
4.3
5.4
6.5
ns
tLABCARRY
0.5
0.7
0.9
ns
tLABCASC
0.8
1.0
1.4
ns
Table 48. EPF10K100E Device EAB Internal Timing Macroparameters (Part 2 of 2)
Note (1)
Symbol
-1 Speed Grade
-2 Speed Grade
-3 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
鐩搁棞PDF璩囨枡
PDF鎻忚堪
ESC65DRAH CONN EDGECARD 130PS R/A .100 SLD
24C01CT-I/OT IC EEPROM 1KBIT 400KHZ SOT23-6
8655MH1501LF DSUB METAL HOOD
M1A3PE1500-FGG676 IC FPGA 1KB FLASH 1.5M 676-FBGA
AMC35DRTN CONN EDGECARD 70POS .100 DIP SLD
鐩搁棞浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
EPF10K50EQC240-3N 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 FPGA - Flex 10K 360 LABs 189 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FBGA-256
EPF10K50EQI240-2 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 FPGA - Flex 10K 360 LABs 189 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FBGA-256
EPF10K50EQI240-2N 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 FPGA - Flex 10K 360 LABs 189 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FBGA-256
EPF10K50ETC144-1 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 FPGA - Flex 10K 360 LABs 102 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FBGA-256
EPF10K50ETC144-2 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 FPGA - Flex 10K 360 LABs 102 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:FBGA-256