參數(shù)資料
型號(hào)： EPC1441TC32N
廠商： Altera
文件頁(yè)數(shù)： 4/26頁(yè)
文件大小： 0K
描述： IC CONFIG DEVICE 440KBIT 32-TQFP
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 250
系列： EPC
可編程類(lèi)型： OTP
存儲(chǔ)容量： 440kb
電源電壓： 3 V ~ 3.6 V，4.75 V ~ 5.25 V
工作溫度： 0°C ~ 70°C
封裝/外殼： 32-TQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
包裝： 托盤(pán)
其它名稱(chēng)： 544-1649
Page 12
Programming and Configuration File Support
Configuration Devices for SRAM-Based LUT Devices
January 2012
Altera Corporation
Programming and Configuration File Support
The Quartus II and MAX+PLUS II softwares provide programming support for Altera
configuration devices. During compilation, the Quartus II and MAX+PLUS II
softwares automatically generates a .pof, which is used to program the configuration
devices. In a multi-device configuration, the software combines the programming
files for multiple ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II,
FLEX 10K, Mercury, Stratix, Stratix GX, Stratix II, and Stratix II GX devices into one or
more configuration devices. The software allows you to select the appropriate
configuration device to store the data for each FPGA.
All Altera configuration devices are programmable using Altera programming
hardware in conjunction with the Quartus II or MAX+PLUS II software. In addition,
many third-party programmers offer programming hardware that supports Altera
configuration devices.
1 An EPC2 device can be programmed with a .pof generated for an EPC1 or EPC1441
device. An EPC1 device can be programmed with a .pof generated for an EPC1441
device.
EPC2 configuration devices can be programmed in-system through its
industry-standard four-pin JTAG interface. ISP capability in the EPC2 devices provide
ease in prototyping and FPGA functionality. When programming multiple EPC2
devices in a JTAG chain, the Quartus II and MAX+PLUS II softwares and other
programming methods employ concurrent programming to simultaneously program
multiple devices and reduce programming time. EPC2 devices can be programmed
and erased up to 100 times.
After programming an EPC2 device in-system, FPGA configuration is initiated by the
INIT
_CONF JTAG instruction of the EPC2 device. For more information, refer to
f For more information about programming and configuration support, refer to the
following documents:
■
■
■
■
■
■
You can also program the configuration devices using the Quartus II or MAX+PLUS II
software with the APU or the appropriate configuration device programming adapter.
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