參數(shù)資料
型號(hào): EP20K100QC240-2
英文描述: Field Programmable Gate Array (FPGA)
中文描述: 現(xiàn)場(chǎng)可編程門陣列(FPGA)
文件頁數(shù): 37/114頁
文件大小: 1623K
代理商: EP20K100QC240-2
Altera Corporation
29
APEX 20K Programmable Logic Device Family Data Sheet
Figure 16. APEX 20K Parallel Expanders
Embedded
System Block
The ESB can implement various types of memory blocks, including
dual-port RAM, ROM, FIFO, and CAM blocks. The ESB includes input
and output registers; the input registers synchronize writes, and the
output registers can pipeline designs to improve system performance. The
ESB offers a dual-port mode, which supports simultaneous reads and
writes at two different clock frequencies. Figure 17 shows the ESB block
diagram.
Figure 17. ESB Block Diagram
32 Signals from
Local Interconnect
To Next
Macrocell
From
Previous
Macrocell
Product-
Term
Select
Matrix
Product-
Term
Select
Matrix
Macrocell
Product-
Term Logic
Macrocell
Product-
Term Logic
Parallel Expander
Switch
Parallel Expander
Switch
wraddress[]
data[]
wren
inclock
inclocken
inaclr
rdaddress[]
q[]
rden
outclock
outclocken
outaclr
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K100QC240-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100QC2403 制造商:Altera 功能描述:_
EP20K100QC240-3 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 CPLD - APEX 20K 416 Macro 189 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP20K100QC240-3ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100QC240-3N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 CPLD - APEX 20K 416 Macro 189 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256