參數(shù)資料
型號： EP20K100ERC240-1ES
元件分類： 數(shù)字電位計
英文描述： Single Digitally Controlled Potentiometer (XDCP™); Temperature Range: -40°C to 85°C; Package: 8-MSOP
中文描述： FPGA的
文件頁數(shù)： 90/114頁
文件大?。?/td> 1623K
代理商： EP20K100ERC240-1ES
Altera Corporation
77
APEX 20K Programmable Logic Device Family Data Sheet
Table 38 through 41 show APEX 20KE LE, ESB, routing, and functional
timing microparameters for the fMAX timing model.
Table 38. APEX 20KE LE Timing Microparameters
Symbol
Parameter
tSU
LE register setup time before clock
tH
LE register hold time after clock
tCO
LE register clock-to-output delay
tLUT
LUT delay for data-in to data-out
Table 39. APEX 20KE ESB Timing Microparameters
Symbol
Parameter
tESBARC
ESB Asynchronous read cycle time
tESBSRC
ESB Synchronous read cycle time
tESBAWC
ESB Asynchronous write cycle time
tESBSWC
ESB Synchronous write cycle time
tESBWASU
ESB write address setup time with respect to WE
tESBWAH
ESB write address hold time with respect to WE
tESBWDSU
ESB data setup time with respect to WE
tESBWDH
ESB data hold time with respect to WE
tESBRASU
ESB read address setup time with respect to RE
tESBRAH
ESB read address hold time with respect to RE
tESBWESU
ESB WE setup time before clock when using input register
tESBDATASU
ESB data setup time before clock when using input register
tESBWADDRSU
ESB write address setup time before clock when using input
registers
tESBRADDRSU
ESB read address setup time before clock when using input
registers
tESBDATACO1
ESB clock-to-output delay when using output registers
tESBDATACO2
ESB clock-to-output delay without output registers
tESBDD
ESB data-in to data-out delay for RAM mode
tPD
ESB Macrocell input to non-registered output
tPTERMSU
ESB Macrocell register setup time before clock
tPTERMCO
ESB Macrocell register clock-to-output delay
相關(guān)PDF資料
PDF描述
EP20K100ERC240-2ES Single Digitally Controlled Potentiometer (XDCP™); Temperature Range: -40°C to 85°C; Package: 8-MSOP
EP20K100ERC240-3ES Single Digitally Controlled Potentiometer (XDCP™); Temperature Range: -40°C to 85°C; Package: 8-TDFN
EP20K100ETC144-2ES FPGA
EP20K100ETC144-3ES 128-Tap DCP, 16kbit EEPROM, and I2C Serial Interface; Temperature Range: -40°C to 85°C; Package: 8-DFN
EP20K100ETI144-1ES FPGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K100ERC240-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERC240-3ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERI208-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERI208-2ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K100ERI208-3ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
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