參數(shù)資料
型號(hào): EMC2103-1-KP-TR
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 模擬信號(hào)調(diào)理
中文描述: SPECIALTY ANALOG CIRCUIT, QCC12
封裝: 4 X 4 MM, ROHS COMPLIANT, QFN-12
文件頁(yè)數(shù): 13/89頁(yè)
文件大小: 1243K
代理商: EMC2103-1-KP-TR
RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
Revision 0.90 (08-19-08)
20
SMSC EMC2103
DATASHEET
4.3
Read Byte
The Read Byte protocol is used to read one byte of data from the registers as shown in Table 4.3.
4.4
Send Byte
The Send Byte protocol is used to set the internal address register pointer to the correct address
location. No data is transferred during the Send Byte protocol as shown in Table 4.4.
4.5
Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address
pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads
of the same register as shown in Table 4.5.
4.6
Alert Response Address
The ALERT output can be used as a processor interrupt or as an SMBus Alert when configured to
operate as an interrupt.
When it detects that the ALERT pin is asserted, the host will send the Alert Response Address (ARA)
to the general address of 0001_100b. All devices with active interrupts will respond with their client
address as shown in Table 4.6.
Table 4.3 Read Byte Protocol
START
SLAVE
ADDRESS
WR
ACK
REGISTER
ADDRESS
ACK
START
SLAVE
ADDRESS
RD
ACK
REGISTER
DATA
NACK
STOP
0 -> 1
0101_110
0
XXh
0
0 -> 1
0101_110
1
0
XXh
1
1 -> 0
Table 4.4 Send Byte Protocol
START
SLAVE
ADDRESS
WR
ACK
REGISTER
ADDRESS
ACK
STOP
0 -> 1
0101_110
0
XXh
1
1 -> 0
Table 4.5 Receive Byte Protocol
START
SLAVE
ADDRESS
RD
ACK
REGISTER DATA
NACK
STOP
0 -> 1
0101_110
1
0
XXh
1
1 -> 0
Table 4.6 Alert Response Address Protocol
START
ALERT
RESPONSE
ADDRESS
RD
ACK
DEVICE
ADDRESS
NACK
STOP
0 -> 1
0001_100
1
0
0101_1100
1
1 -> 0
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