參數(shù)資料
型號(hào): EL7532IL-T7
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: 2.4 A SWITCHING REGULATOR, 1650 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, 1 MM HEIGHT, MO-229, DFN-10
文件頁數(shù): 7/9頁
文件大?。?/td> 829K
代理商: EL7532IL-T7
7
At extreme conditions (V
IN
< 3V, I
O
> 0.7A, and junction
temperature higher than 75°C), input cap C
1
is
recommended to be 22μF. Otherwise, if any of the above 3
conditions is not true, C
1
can remain as low as 10μF.
The RMS current present at the input capacitor is decided by
the following formula:
This is about half of the output current I
O
for all the V
O
. This
input capacitor must be able to handle this current.
The inductor peak-to-peak ripple current is given as:
L is the inductance
f
S
the switching frequency (nominally 1.5MHz)
The inductor must be able to handle I
O
for the RMS load
current, and to assure that the inductor is reliable, it must
handle the 3A surge current that can occur during a current
limit condition.
Current Limit and Short-Circuit Protection
The current limit is set at about 3A for the PMOS. When a
short-circuit occurs in the load, the preset current limit
restricts the amount of current available to the output, which
causes the output voltage to drop below the preset voltage.
In the meantime, the excessive current heats up the
regulator until it reaches the thermal shut-down point.
Thermal Shut-Down
Once the junction reaches about 145°C, the regulator shuts
down. Both the P channel and the N channel MOSFETs turn
off. The output voltage will drop to zero. With the output
MOSFETs turned off, the regulator will soon cool down.
Once the junction temperature drops to about 130°C, the
regulator will restart again in the same manner as EN pin
connects to logic HI.
Thermal Performance
The EL7532 is in a fused-lead MSOP10 package. Compared
with regular MSOP10 package, the fused-lead package
provides lower thermal resistance. The
θ
JA
is 100°C/W on a
4-layer board and 125°C/W on 2-layer board. Maximizing the
copper area around the pins will further improve the thermal
performance.
Layout Considerations
The layout is very important for the converter to function
properly. The following PC layout guidelines should be
followed:
Separate the Power Ground ( ) and Signal Ground (
connect them only at one point right at the pins
);
Place the input capacitor as close to V
IN
and PGND pins
as possible
Make the following PC traces as small as possible:
- from L
X
pin to L
- from C
O
to PGND
If used, connect the trace from the FB pin to R
1
and R
2
as
close as possible
Maximize the copper area around the PGND pin
Place several via holes under the chip to additional ground
plane to improve heat dissipation
The demo board is a good example of layout based on this
outline. Please refer to the EL7532 Application Brief.
I
INRMS
V
V
- V
V
IN
)
-----------------------------------------------
I
O
×
=
I
IL
V
L
--------------------------------------------
V
IN
O
f
S
×
×
=
EL7532
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